Memory Controller Error Classification for Cell Longevity
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Solution Overview
Problem
Conventional memory controllers do not differentiate between RTN and RD errors, leading to unnecessary memory cell refreshes, which can degrade memory cells.
Innovation Solution
A memory system with a read processing unit, error detection unit, re-read processing unit, and refresh processing unit that uses different thresholds to identify and refresh only memory cells with errors that require it, thereby minimizing unnecessary refreshes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a memory cell is refreshed every time an error occurs regardless of error type, then error detection capability is improved, but memory cell degradation accelerates due to unnecessary refreshes
Solution Approach 1:
The patent segments error types into RTN errors and RD errors, applying different handling strategies to each type. RTN errors are detected and logged without triggering refresh, while RD errors trigger refresh operations, thereby avoiding unnecessary refreshes for RTN errors and extending memory cell lifespan while maintaining error detection capability
Solution Approach 2:
The patent changes the parameter of refresh operation frequency based on error type. For RTN errors, refresh is suppressed (frequency reduced to zero), while for RD errors, refresh is performed normally. This parameter adjustment resolves the contradiction by optimizing both reliability and memory cell durability
2Productivity
If RTN error is treated as a primary state change that naturally recovers, then unnecessary refresh operations are reduced, but error detection and correction may be delayed
Solution Approach 1:
The patent performs preliminary error type classification when an error is detected, identifying whether it is an RTN error or RD error before determining the appropriate action. This preliminary action allows the system to immediately suppress unnecessary refreshes for RTN errors while maintaining timely error correction through logging and subsequent processing
3Device complexity
If conventional ECC is used without error type discrimination, then error correction is simplified, but memory cell degradation progresses due to excessive refresh operations
Solution Approach 1:
The patent segments the error correction process into two paths: one for RTN errors (detection and logging only) and one for RD errors (detection and refresh). This segmentation adds minimal complexity to the conventional ECC while dramatically reducing unnecessary refresh operations and extending memory cell lifespan
Solution Approach 2:
The patent introduces an intermediary error type classification mechanism between error detection and refresh execution. This intermediary layer classifies errors as RTN or RD type and routes them to appropriate handling paths, adding minimal complexity while preventing excessive refresh operations
Data Source
AI summary
To suppress the degradation of memory cells in a non-volatile memory. A read processing unit performs a read process for reading read data from each of a plurality of memory cells on the basis of a first threshold. An error detection unit detects presence or absence of an error in the read data and specifies memory cells in which the error is present among the plurality of memory cells. A re-read processing unit performs a re-read process for reading data, as re-read data, from the specified memory cells on the basis of a second threshold different from the first threshold. A refresh processing unit rewrites, for a memory cell of which the re-read data has a different value from the read data among the specified memory cells, data with the re-read data as a refresh process.