Memory Controller Status-Based Read Processing for Error Control

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Solution Overview

Problem

Conventional memory systems lack flexibility in operation, leading to inadequate performance under varying conditions and potential undetectable and uncorrectable errors, which affects stability and reliability.

Innovation Solution

A memory system configuration that includes a memory device and a memory controller, where the controller receives status information to dynamically adjust operations, enabling flexible data processing and error handling, thereby improving stability, reliability, and flexibility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If a memory system uses a rigid configuration for data processing, then the structure is simple and easy to manufacture, but the system cannot adapt to varying conditions and may produce incorrect operations

Engineering Contradiction:
Improveflexibility of operationVSAvoidconfiguration complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The memory controller dynamically adjusts its data processing operations based on status information received from the memory device. The controller can switch between different processing modes (e.g., first operation, second operation, third operation) depending on the internal status of the memory device, making the system adaptive rather than rigid.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes operational parameters based on status information. When the memory device's internal status changes (such as temperature, wear level, or error rate), the controller modifies its processing parameters accordingly, selecting different operations from a set of available operations to optimize performance and reliability.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the memory system performs comprehensive error processing operations, then reliability improves, but power consumption and processing time increase

Engineering Contradiction:
Improveerror detection and correction capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory controller adjusts the intensity and type of error processing operations based on status information from the memory device. When the status indicates low risk (e.g., normal temperature, low wear), the controller performs lighter error checking. When status indicates high risk, more comprehensive error processing is applied, optimizing the balance between reliability and power consumption.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Instead of always performing full error processing, the system applies partial error processing when conditions permit. The controller selectively applies error detection and correction operations based on the current status, performing only the necessary level of error processing required for the given conditions.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If the memory system uses fixed data processing operations, then the design is simpler, but the system cannot optimize performance under varying conditions

Engineering Contradiction:
Improvedata processing performanceVSAvoidcontrol logic complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory controller dynamically selects and executes different data processing operations based on real-time status information from the memory device. This allows the system to optimize performance for current conditions while maintaining a manageable control structure through status-based decision making.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10866855B2Memory system varying operation of memory controller according to internal status of memory device
Publication Date: 2020.12.15 SAMSUNG ELECTRONICS CO LTD
  • US10866855B2 patent drawing
  • US10866855B2 patent drawing
  • US10866855B2 patent drawing

AI summary

A memory system includes a memory device and a memory controller. The memory device outputs data in response to a read command. The memory device includes a first function circuit which performs a first operation based on data stored in the memory device, in response to the read command, to generate first processed data. The memory controller provides the read command to the memory device in response to a read request received from a host. The memory controller receives status information associated with performing the first operation. The memory controller includes a second function circuit which performs a second operation based on the first processed data to generate second processed data. A manner of the second operation varies based on the status information.