Memory Controller Error Recovery via Parity and Zero Data

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Solution Overview

Problem

Current semiconductor memory devices face inefficiencies in data recovery due to uncorrectable errors, particularly when multiple errors occur within a data stripe, leading to reduced data integrity and operational stability.

Innovation Solution

A controller is designed to perform error correction operations by generating recovery data using parity data and remaining unit data, replacing erroneous unit data with recovery data and zero data, and remapping physical positions to improve data recovery efficiency across multiple memory blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction operation is performed on multiple unit data in a data stripe, then data integrity is improved, but data recovery efficiency deteriorates when multiple errors occur

Engineering Contradiction:
Improvedata integrityVSAvoiddata recovery efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The controller performs preliminary error correction operations on unit data before data recovery. When errors are detected in multiple unit data within a data stripe, the controller proactively generates recovery data using parity data and remaining correct unit data, and replaces erroneous data with recovery data or zero data before further processing. This preliminary action prevents propagation of errors and improves subsequent data recovery efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller introduces an intermediary error correction reference table that stores information about unit data requiring error correction. This intermediary structure enables efficient tracking and management of erroneous data across multiple memory blocks, allowing the controller to systematically apply recovery operations without reprocessing already-corrected data, thus improving overall data recovery efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If recovery data is generated using parity data and remaining unit data, then data recovery capability is improved, but operational complexity increases

Engineering Contradiction:
Improvedata recovery capabilityVSAvoidoperational complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The controller changes the state of unit data by replacing erroneous data with recovery data or zero data based on error correction results. This parameter change approach simplifies the operational complexity by providing clear replacement rules rather than attempting to reconstruct original data, while still maintaining data recovery capability through the use of parity data and remaining correct unit data.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The controller uses zero data as a disposable replacement for unit data that cannot be recovered. Instead of attempting complex recovery for all erroneous data, the system accepts that some data may be lost and uses zero data as a simple placeholder, reducing operational complexity while maintaining overall system reliability through selective recovery of recoverable data.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS11531586B2Controller and method of operating the same
Publication Date: 2022.12.20 SK HYNIX INC
  • US11531586B2 patent drawing
  • US11531586B2 patent drawing
  • US11531586B2 patent drawing

AI summary

A memory system includes at least one semiconductor memory device including a plurality of memory blocks in which an original data stripe including a plurality of unit data and parity data is stored, and a controller configured to control an operation of the semiconductor memory device. The controller performs an error correction operation on one or more unit data received from the semiconductor memory device, and generates data for recovery based on remaining data except for first and second unit data among the plurality of unit data, in response to a first error correction failure for the first unit data among the plurality of unit data and a second error correction failure for the second unit data.