Memory Controller Error Tracking for Lifespan Extension

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Solution Overview

Problem

Memory devices, particularly non-volatile ones, face limitations in the number of access cycles, leading to compromised functionality and potential failure, as cells reach their lifetime limits, necessitating effective health management to prolong their lifespan.

Innovation Solution

Implementing a dynamic health monitoring and management system that uses error correction circuitry to count and track errors, compare them against thresholds, and adjust operations by mapping unhealthy memory regions to healthy ones, thereby extending the lifespan of memory devices.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If memory cells are continuously accessed for data storage and retrieval, then productivity and system functionality are maintained, but the memory device lifespan deteriorates as cells reach their access cycle limits

Engineering Contradiction:
Improvedata access continuityVSAvoidmemory device lifespan
Core Design Contradiction:
ProductivityVSDuration of action of stationary object

Solution Approach 1:

The system performs preliminary actions by monitoring error rates and identifying at-risk memory regions before complete failure occurs. By proactively detecting degradation trends through error counting and comparison against thresholds, the system can relocate data from vulnerable regions to healthy regions in advance, preventing data loss and extending the operational lifespan of the memory device while maintaining continuous productivity

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary health monitoring and data relocation system that acts as a mediator between the memory cells and the host system. This intermediary layer monitors error rates, identifies deteriorating regions, and performs automated data relocation without requiring host system intervention, thereby extending memory device lifespan while maintaining uninterrupted data access and system productivity

Inventive Principle:
Principle #24Intermediary (Mediator)

2Duration of action of stationary object

If error correction circuitry continuously monitors and manages memory health, then memory device lifespan is extended, but device complexity increases

Engineering Contradiction:
Improvememory device lifespanVSAvoidhealth monitoring system complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The error correction circuitry is designed to perform multiple functions: traditional error correction, error rate monitoring, threshold comparison, and data relocation control. By making the ECC system multi-functional, the patent extends memory lifespan through continuous health monitoring without requiring separate dedicated monitoring hardware, thereby managing device complexity while achieving extended operational life

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The memory system performs self-service through automated health monitoring and self-directed data relocation. The error correction circuitry autonomously monitors its own operational status, identifies deteriorating regions, and triggers data relocation without external intervention. This self-service capability extends memory device lifespan while minimizing the complexity overhead of the monitoring system

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10657014B2Methods for monitoring and managing memory devices
Publication Date: 2020.05.19 EVERSPIN TECHNOLOGIES INC
  • US10657014B2 patent drawing
  • US10657014B2 patent drawing
  • US10657014B2 patent drawing

AI summary

The present disclosure is drawn to, among other things, a method of managing a memory device. In some aspects, the method includes scanning a first memory region for bit errors; in response to detecting one or more bit errors in the first memory region, incrementing a counter associated with the first memory region based on the number of bit errors detected; comparing a total number of bit errors against a threshold, wherein the total number of bit errors is identified from the first counter; and, if the total number of bit errors exceeds the threshold, restricting access to the first memory region by mapping an address corresponding to the first memory region to a second memory region.