Memory Controller Feature Boosting for NAND Error Correction

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Solution Overview

Problem

Current semiconductor memory systems face challenges in accurately correcting errors in NAND memory due to internal data corruption caused by electrical or magnetic interference and degradation, which existing Error Correction Code (ECC) controllers struggle to address effectively, especially with increasing demands for performance and security.

Innovation Solution

A semiconductor memory system and operating method that utilize a memory controller with a feature booster and linear predictor to model NAND data using a mixture model with latent variables, allowing for accurate prediction of failed bits and feature information, employing Gaussian mixture modeling and Student-t distributions to improve error correction capabilities.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional ECC controllers are used for error correction, then the system structure remains simple, but the error correction accuracy deteriorates due to inability to handle internal data corruption from NAND degradation

Engineering Contradiction:
Improveerror correction accuracyVSAvoidcontroller structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The controller is segmented into multiple functional modules: a mixture model construction unit that creates probabilistic models of NAND data patterns, a feature booster that extracts relevant features from raw data, and a linear predictor that uses these features to predict error locations. This segmentation allows each module to specialize in a specific aspect of error correction, improving overall accuracy while keeping individual module complexity manageable.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary layer between the NAND memory and the traditional ECC controller. This intermediary consists of the mixture model and feature extraction mechanisms that preprocess the data and provide enhanced error patterns to the ECC controller. This intermediary layer bridges the gap between simple ECC structures and the need for high accuracy by transforming raw data into more informative representations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If mixture model with latent variables is used to model NAND data, then the error prediction accuracy is improved, but the computational complexity increases

Engineering Contradiction:
Improvefailed bits prediction accuracyVSAvoidcomputational power consumption
Core Design Contradiction:
Measurement precisionVSPower

Solution Approach 1:

The mixture model with latent variables is constructed and trained in advance during a preliminary phase, capturing the statistical characteristics of NAND data degradation patterns. Once trained, the model can quickly predict error locations during normal operation without requiring complex real-time computations. This preliminary action separates the heavy computational work from the operational phase, reducing power consumption during actual error correction.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent employs parameter changes by using different distribution models (Gaussian, Student-t, Gamma distributions) for different latent variables in the mixture model. By selecting appropriate distribution types and adjusting their parameters based on the specific degradation patterns observed, the system optimizes prediction accuracy while managing computational complexity through parameter optimization rather than structural complexity.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If feature booster and linear predictor are employed, then the system reliability is improved through better error correction, but the device complexity increases

Engineering Contradiction:
Improvesystem reliabilityVSAvoidcontroller architecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The feature booster and linear predictor are designed as universal modules that can handle multiple types of NAND degradation patterns and error conditions through a unified framework. The mixture model can accommodate different distribution types for different latent variables, allowing the same architectural structure to adapt to various degradation scenarios. This universality reduces the need for multiple specialized components, thereby managing complexity while maintaining high reliability across different operating conditions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10163515B1Memory system having feature boosting and operating method thereof
Publication Date: 2018.12.25 SK HYNIX INC
  • US10163515B1 patent drawing
  • US10163515B1 patent drawing
  • US10163515B1 patent drawing

AI summary

A semiconductor memory system and an operating method thereof include a plurality of memory devices; and a memory controller including a feature booster and a linear predictor and coupled with the plurality of memory devices, wherein the controller is configured to collect NAND data from at least 1 data point, and model the collected NAND data with a mixture model, wherein the mixture model includes parameters and at least two latent variables modeled with different distribution modeling, the feature booster is configured to predict the parameters, and the linear predictor is configured to predict feature information.