Memory Controller Firmware Error Detection Using Idle Cores

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Solution Overview

Problem

Memory systems face malfunctions due to firmware errors, which can lead to operational instability and latency, especially in portable devices where mechanical failures are minimized but bit flip errors and other transient issues can occur, making it difficult to maintain normal operation.

Innovation Solution

A method and apparatus that utilize multiple cores in a memory system to dynamically check firmware for errors by performing checksums in standby or idle states, allowing for timely error detection and correction, and notifying the host to initiate a reset if necessary, thereby preventing malfunctions and maintaining system reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If firmware error checking is performed continuously during operation, then reliability is improved, but productivity deteriorates due to increased operational latency

Engineering Contradiction:
Improvefirmware error detection capabilityVSAvoidoperational speed
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements periodic firmware error checking by utilizing idle or standby cores to perform checksum operations at intervals rather than continuously. This allows the system to maintain high operational speed during active periods while periodically verifying firmware integrity, thus resolving the contradiction between reliability and productivity.

Inventive Principle:
Principle #19Periodic action

2Reliability

If multiple cores are used for error checking, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improvesystem stabilityVSAvoidcontroller architecture
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent makes existing cores multi-functional by enabling them to perform both data processing tasks and firmware error checking. During idle or standby states, cores execute checksum operations on firmware, eliminating the need for dedicated error-checking hardware and reducing overall device complexity while maintaining high reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If error checking is performed during active operation, then reliability is improved, but loss of time increases due to operational interruptions

Engineering Contradiction:
Improvefirmware integrity verificationVSAvoidoperational latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements self-service error checking where idle or standby cores automatically perform firmware verification without requiring external intervention or causing operational interruptions. The system uses its own idle resources to maintain firmware integrity, eliminating time loss while improving reliability.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11409606B2Apparatus and method for handling a firmware error in operation of a memory system
Publication Date: 2022.08.09 SK HYNIX INC
  • US11409606B2 patent drawing
  • US11409606B2 patent drawing
  • US11409606B2 patent drawing

AI summary

A memory system includes a memory device including plural non-volatile memory cells storing firmware and a controller configured to load the firmware in a volatile memory and employ a plurality of cores, each capable of performing an operation based on the firmware. A core, which is in a standby state or an idle state between the plurality of cores, is configured to check whether an error has occurred in the volatile memory in which the firmware is loaded.