Memory Controller Command Routing for Flash Access Conflicts

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Solution Overview

Problem

In embedded systems, conflicts in accessing flash memories can lead to performance issues due to different applications having varying data access requirements, causing delays and inefficiencies, especially in scenarios like digital dashboards where read and write operations are interdependent.

Innovation Solution

The implementation of a memory device with separate memory arrays for read-oriented and write-oriented applications, allowing the memory controller to manage access commands independently, ensuring that read and write operations are executed concurrently but separately, reducing conflicts and enhancing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single memory array is used for both read and write operations, then the device complexity is reduced, but access conflicts occur causing performance degradation

Engineering Contradiction:
Improvememory array configurationVSAvoidmemory access efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory device is divided into multiple independent memory arrays (first memory array and second memory array) that can be independently accessed. The memory controller segments access commands based on application attributes, directing read-intensive applications to one array and write-intensive applications to another, thereby eliminating access conflicts while maintaining manageable device complexity through structured organization

Inventive Principle:
Principle #1Segmentation

2Productivity

If separate memory arrays are used for different application types, then memory access efficiency is improved, but the device complexity increases

Engineering Contradiction:
Improvememory access efficiencyVSAvoidmemory array configuration
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory controller implements a universal command management mechanism that can handle multiple types of access commands (read, write, erase) and route them to appropriate memory arrays based on application attributes. This multi-functional approach allows the system to achieve high memory access efficiency through separate arrays while the controller's universal handling capability prevents excessive complexity from arising

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If multiple memory arrays are implemented with independent access, then access conflicts are reduced, but the control complexity increases

Engineering Contradiction:
Improveparallel operation capabilityVSAvoidcommand management
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory controller implements dynamic command routing that adapts to different application attributes in real-time. Based on the detected application type (read-intensive or write-intensive), the controller dynamically selects which memory array to use, enabling parallel operations across multiple arrays while keeping control logic manageable through attribute-based decision making rather than complex scheduling algorithms

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11068204B2Memory device with multiple physical spaces, multiple non-volatile memory arrays, multiple main data, multiple metadata of multiple types of commands, and access method thereof
Publication Date: 2021.07.20 MACRONIX INTERNATIONAL CO LTD
  • US11068204B2 patent drawing
  • US11068204B2 patent drawing
  • US11068204B2 patent drawing

AI summary

A memory device and an access method applied to the memory device are provided. The memory device is electrically connected to a host, and the memory device includes a memory circuit and a memory controller. The memory circuit includes a first memory array and a second memory array. The first memory array and the second memory array respectively provide a first physical space and a second physical space. The memory controller receives an access command from the host. The memory controller performs the access command to the first physical space when the access command is a first type of command, and the memory controller performs the access command to the second physical space when the access command is a second type of command.