Memory Controller Data Flush for Power Loss

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Solution Overview

Problem

Current systems require significant processing resources and power to flush modified data from volatile cache memory to persistent storage, especially during system shutdowns or failures, which can be time and power consuming.

Innovation Solution

Implementing a memory controller that reads and transfers modified data from the volatile cache to persistent storage using Reliability, Availability, and Serviceability (RAS) controllers, reducing the need for processor involvement and conserving battery power by utilizing existing hardware for normal memory operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the operating system reads modified data from volatile memory to write to persistent storage during shutdown, then data persistence is ensured, but processing resources and power consumption increase significantly

Engineering Contradiction:
Improvedata persistenceVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts the data flushing function from the operating system/processor domain and relocates it to the memory controller domain. The memory controller independently identifies modified data in the volatile memory and transfers it to persistent storage without requiring processor involvement, thereby eliminating the power-intensive processor operations while ensuring data persistence.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The memory controller performs self-service by autonomously monitoring which data blocks have been modified and initiating the transfer to persistent storage without external commands. This self-managed approach allows the system to flush data using only the memory controller's power budget, independent of the processor's power state.

Inventive Principle:
Principle #25Self-service

2Reliability

If the processor flushes modified data to persistent storage, then data is saved, but processing time and system shutdown time increase

Engineering Contradiction:
Improvedata persistenceVSAvoidshutdown time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent removes the flushing operation from the processor's responsibility and time-critical shutdown sequence. By delegating this function to the memory controller, the processor can initiate shutdown immediately without waiting for data transfers, as the memory controller handles the flushing in parallel using its own operational timeline.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The memory controller continuously monitors and identifies modified data blocks in advance, maintaining a ready list of data to be flushed. This preliminary identification allows the controller to immediately begin transfer operations when power is lost or shutdown is initiated, minimizing the actual shutdown time while ensuring all modified data is preserved.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If existing hardware is used for flushing operations, then additional hardware requirements are reduced, but the memory controller must handle increased operational complexity

Engineering Contradiction:
Improvehardware requirementsVSAvoidmemory controller automation
Core Design Contradiction:
Device complexityVSExtent of automation

Solution Approach 1:

The patent makes the memory controller multi-functional by assigning it both its traditional memory management duties and the additional responsibility of data flushing to persistent storage. This universal approach eliminates the need for dedicated flushing hardware while the memory controller's existing automation capabilities are extended to handle the new function through software or firmware logic.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11036634B2Apparatus, system, and method to flush modified data from a volatile memory to a persistent second memory
Publication Date: 2021.06.15 INTEL CORP
  • US11036634B2 patent drawing
  • US11036634B2 patent drawing
  • US11036634B2 patent drawing

AI summary

Provided are an apparatus, system, and method to flush modified data from a first memory to a persistent second memory. A first memory controller coupled to the first memory includes at least one RAS controller to read a range of addresses in the first memory. In response to receiving a command from the power control unit, the at least one RAS controller is invoked to read data from at least one range of addresses specified for the RAS controller from the first memory. A second memory controller transfers data read from the first memory determined to be modified to the second memory. The first memory controller sends a signal to the power control unit to indicate that the modified data in the range of addresses specified for the RAS controller was flushed to the second memory in response to the RAS controller completing reading the range of addresses.