Memory Controller Free Block Allocation for Write Latency
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Solution Overview
Problem
In nonvolatile memory systems, the existing methods for managing program operation time and write latency are inefficient due to the need for erase operations, which increase program operation time and write latency, especially when dealing with large volumes of data and changing threshold voltage distributions over time.
Innovation Solution
The proposed solution involves generating free blocks based on the number of prospective closed blocks before performing a program operation for write data, minimizing the number of free blocks generated, and preferentially allocating them to memory blocks with insufficient programmable pages to reduce program operation time and write latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If erase operations are performed on erase target blocks during program operation, then free blocks are generated for subsequent programming, but program operation time and write latency increase
Solution Approach 1:
The controller predicts which blocks will become closed blocks (prospective closed blocks) and performs erase operations on their corresponding erase target blocks in advance, before the actual program operation is needed. This preliminary action ensures that free blocks are ready when required, eliminating the need to perform erase operations during critical program operations, thus reducing program operation time and write latency while maintaining adequate supply of free blocks
2Quantity of substance
If erase operations are performed on erase target blocks during program operation, then free blocks are generated, but write latency increases
Solution Approach 1:
The controller performs erase operations on erase target blocks corresponding to prospective closed blocks before the program operation is initiated. By anticipating future block closure and preparing free blocks in advance, the system eliminates wait time during write operations, thereby reducing write latency while ensuring sufficient free blocks are available
3Reliability
If the number of free blocks is minimized considering threshold voltage distribution changes, then reliability of write data improves, but program operation time may increase
Solution Approach 1:
The controller predicts prospective closed blocks and performs erase operations in advance, creating free blocks with optimal timing. By generating free blocks before they are needed and managing their allocation strategically, the system minimizes the number of free blocks that would otherwise sit idle (reducing threshold voltage distribution changes) while ensuring adequate free blocks are available when needed, thus improving reliability without significantly increasing program operation time
Data Source
AI summary
An operation method of a memory system may include monitoring the size of a programmable area included in each of a plurality of open blocks in which a plurality of data having different attributes are stored, respectively, and generating a first free block by performing a first erase operation on a part of a plurality of erase target blocks based on the number of first open blocks, each open block of which the programmable area has a size less than a threshold value, among the plurality of open blocks.