Memory Controller Hides Page Faults During Tiered Search
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Solution Overview
Problem
Conventional electronic systems experience inefficiencies and operational delays during read operations due to the need to search for requested information across multiple memory tiers, which can lead to unnecessary notifications of faults and interruptions in the host device's processes.
Innovation Solution
A controller unit manages data movement and page table operations across multiple memory tiers without notifying the host device of faults, allowing continuous searching and efficient data retrieval by organizing memory into 'near' and 'far' tiers with variable latency, and controlling the flow of information between the host device and memory units.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the host device or operating system performs additional operations to search for requested information across multiple memory tiers, then the information can be located even if moved to another memory device, but operational delays occur and host device performance deteriorates
Solution Approach 1:
The patent extracts the fault notification and searching functionality from the host device and operating system, concentrating it in the memory controller. The memory controller independently handles page fault detection and information searching across memory tiers, removing this time-consuming task from the host device's responsibility and eliminating operational delays while maintaining information location capability
Solution Approach 2:
The memory controller acts as an intermediary between the host device and multiple memory tiers. It manages the complex task of searching for moved information across different memory devices and tiers, shielding the host device from these operations and preventing operational delays while ensuring information can still be located
2Reliability
If the host device is notified of faults during read operations, then the system can detect and report errors, but the host device's processes are interrupted and efficiency decreases
Solution Approach 1:
The patent extracts the fault handling functionality from the host device and relocates it to the memory controller. The memory controller detects page faults and manages the searching process independently without notifying the host device, maintaining fault detection capability while eliminating interruptions to host device processes and preserving efficiency
Solution Approach 2:
The memory controller performs self-service by independently detecting page faults and searching for required information across memory tiers without host device intervention. This autonomous fault handling maintains reliability while preventing productivity loss by keeping the host device's processes uninterrupted
Data Source
AI summary
Some embodiments include apparatuses and methods having a memory unit and a controller device. The controller device can be configured to receive a request from a host device and access a data structure in the memory unit to determine whether information associated with the request is in the data structure. The controller device can be configured such that if a fault related to accessing the data structure occurs, the controller device continues searching for the information associated with the request without notifying the host device of the fault.