Memory Controller Request Selection Using History Registers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In information processing systems, the uneven distribution of memory access leads to reduced process speed and buffer overflow, causing throughput deterioration due to frequent access to specific memory quadrants or vaults, resulting in inefficient data transfer and reduced capacity.
Innovation Solution
An information processing apparatus with a memory controller that includes a buffer for unselected requests, a history register to store addresses of past requests, and a selection unit to prioritize requests based on historical access patterns, ensuring balanced distribution of access events across multiple memory banks and vaults.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If memory access is concentrated on specific quadrants or vaults, then access speed to those specific areas is improved, but buffer overflow occurs and throughput deteriorates
Solution Approach 1:
The patent applies local quality by making different parts of the memory system (quadrants, vaults, memory banks) have different access priorities based on their current utilization state. The selection unit dynamically identifies which memory regions have lower access frequency and directs requests to those regions, creating localized optimization that balances overall system throughput while maintaining efficient access to specific areas.
2Speed
If memory access is concentrated on specific quadrants or vaults, then access speed to those specific areas is improved, but buffer overflow occurs
Solution Approach 1:
The patent implements feedback by continuously monitoring the access frequency of each quadrant and vault through the history register, and using this information to dynamically adjust request selection. The selection unit receives feedback about which memory regions have been accessed recently and prioritizes requests to regions with lower access frequency, preventing buffer overflow by distributing access load before the buffer becomes full.
3Device complexity
If requests are transmitted without considering historical access patterns, then device complexity is reduced, but data transfer efficiency deteriorates
Solution Approach 1:
The patent applies preliminary action by pre-monitoring and recording access patterns in the history register before making selection decisions. The system maintains a record of which quadrants and vaults have been recently accessed, allowing the selection unit to proactively choose requests that will balance future access patterns, improving data transfer efficiency without requiring complex real-time analysis during request processing.
Data Source
AI summary
An information processing apparatus includes: a memory device configured to store data; an arithmetic processor configured to issue a request to be transmitted to the memory device; and a memory controller including: a buffer configured to store one or more unselected requests that are issued by the arithmetic processing processor and are not selected; a history register configured to hold one or more addresses for one or more transmitted requests that have been transmitted to the memory device; and a selection unit configured to select, from the one or more unselected requests stored in the buffer, a target request to be transmitted to the memory device based on the one or more addresses stored in the history register and transmit the target request to the memory device.