Memory Controller Encryption for Host Memory Buffer Security

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Solution Overview

Problem

Current memory systems, such as solid state drives (SSDs), face challenges in efficiently managing data storage and security when using host memory buffers (HMBs), as they lack effective encryption mechanisms, leading to potential data tampering and security vulnerabilities.

Innovation Solution

The implementation of a memory system that utilizes a controller to encrypt data written into and decrypt data read from host memory buffers using encryption keys associated with specific regions, enhancing data security by preventing tampering and ensuring accurate decryption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If data is stored in host memory buffers without encryption, then access speed and simplicity are improved, but data security and integrity deteriorate

Engineering Contradiction:
Improveaccess speedVSAvoiddata security
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The controller performs encryption of data before writing to the host memory buffer, and decryption before reading from it. This preliminary cryptographic processing ensures that data is protected during storage in the buffer without requiring changes to the buffer's fundamental access mechanism, thus maintaining access speed while improving data security

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The controller acts as an intermediary between the host and the memory buffer, managing all read/write operations to and from the buffer. It implements encryption/decryption logic and validation mechanisms, serving as a security layer that protects data in the buffer without requiring the host or buffer to change their operation characteristics

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If encryption is implemented for host memory buffers, then data security is improved, but system complexity increases

Engineering Contradiction:
Improvedata securityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The encryption functionality is merged into the existing memory controller, which already manages read/write operations to the host memory buffer. By combining cryptographic operations with the controller's existing data path management, the system achieves security enhancement without adding separate dedicated encryption hardware or significantly increasing overall system complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory controller is designed to perform multiple functions: traditional memory management tasks plus cryptographic encryption/decryption operations. This multi-functionality allows the controller to provide security services without requiring additional specialized components, thereby limiting the increase in system complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Measurement precision

If encryption keys are managed for each region, then data integrity detection is improved, but key management complexity increases

Engineering Contradiction:
Improveintegrity detectionVSAvoidkey management complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The host memory buffer is divided into multiple regions, with distinct encryption keys assigned to each region. This segmentation enables precise integrity detection for data in each region, as any tampering can be detected by validating against the region-specific key. The controller manages these multiple keys through organized storage and selection mechanisms, making the complexity manageable

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11847243B2Memory system
Publication Date: 2023.12.19 KIOXIA CORP
  • US11847243B2 patent drawing
  • US11847243B2 patent drawing
  • US11847243B2 patent drawing

AI summary

According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller controls the nonvolatile memory, writes data to a random access memory in a host, and reads data from the random access memory. The random access memory includes regions in first units to which the controller is accessible. The controller uses encryption keys associated with the regions, respectively, for encrypting data to be written into each of the regions and decrypting data read from each of the regions.