Nonvolatile Memory Controller Host Burden Reduction

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Solution Overview

Problem

Current systems for controlling nonvolatile memory in server environments face challenges in achieving high I/O performance due to increased host-side burden, necessitating the reduction of host-side workload to enhance storage device efficiency.

Innovation Solution

A memory system architecture where a controller manages nonvolatile memory by receiving write and read commands from the host, determining storage locations, and handling data operations to optimize storage and retrieval processes, including the use of Quality of Service (QoS) domains and write buffers to allocate and manage data blocks efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the host directly controls nonvolatile memory to achieve high I/O performance, then I/O performance is improved, but host-side burden increases

Engineering Contradiction:
ImproveI/O performanceVSAvoidhost-side burden
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent introduces a memory system controller as an intermediary between the host and nonvolatile memory. The controller manages write and read operations, determining storage locations and handling data operations, thereby reducing the host-side burden while maintaining high I/O performance through efficient memory control

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the host controls write and read operations directly, then data management flexibility is improved, but operation complexity increases

Engineering Contradiction:
Improvedata management flexibilityVSAvoidoperation complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The memory system controller performs self-service by autonomously managing write and read operations. It receives commands from the host, determines appropriate storage locations, and executes data operations without requiring complex host intervention, thereby maintaining flexibility while simplifying operation

Inventive Principle:
Principle #25Self-service

3Measurement precision

If the host determines data readability from nonvolatile memory, then data access accuracy is improved, but processing burden increases

Engineering Contradiction:
Improvedata access accuracyVSAvoidprocessing burden
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The controller acts as an intermediary that handles the complexity of determining data readability. It receives read commands from the host, determines whether data is readable from nonvolatile memory, and manages the read operations, thereby maintaining accurate data access while reducing processing burden on the host

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS12112073B2Method for controlling write and read operations in the nonvolatile memory by a host, using an identifier for a region
Publication Date: 2024.10.08 KIOXIA CORP
  • US12112073B2 patent drawing
  • US12112073B2 patent drawing
  • US12112073B2 patent drawing

AI summary

According to one embodiment, a memory system determines a write destination block and a write destination location in the write destination block to which write data is to be written, and notifies a host of an identifier of the write data, a block address of the write destination block, and an offset indicative of the write destination location. The memory system retrieves the write data from a write buffer of the host, and writes the write data to the write destination location. In a case where a read command to designate a physical address of first data is received before a write operation of the first data is finished, the memory system reads the first data from the write buffer of the host.