Memory Controller Access Using Host DRAM for Flash Cell Parameters
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Solution Overview
Problem
Memory controllers in data storage systems often have limited resources, which can lead to inefficiencies in accessing and managing non-volatile memory cells, particularly in devices like Flash memories, where they must handle multiple analog memory cells with varying programming levels and error correction needs.
Innovation Solution
The memory controller utilizes the host system's resources, such as DRAM, to store information items like read thresholds, programming parameters, and error correction codes, allowing it to access and manage analog memory cells more efficiently by retrieving necessary information from the host memory and applying it to the memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory controllers use their own internal resources to manage non-volatile memory cells, then they can maintain data access autonomy and reliability, but the device size, cost, and power consumption increase
Solution Approach 1:
The patent extracts the resource management function from the memory controller and relocates it to the host system. Specifically, threshold values, programming parameters, and status information are stored in the host's DRAM memory rather than in the controller's internal memory, thereby reducing the controller's hardware complexity while maintaining system reliability through the host's greater resource capacity.
Solution Approach 2:
The host system's DRAM memory is made multi-functional by serving both the host's operational needs and the memory controller's resource management needs. The host processor and its memory system universally handle both host applications and memory controller parameter storage, eliminating the need for dedicated controller memory and reducing overall system complexity.
2Productivity
If memory controllers allocate more internal resources for managing high-density non-volatile memory, then programming and readout speed improve, but power consumption and manufacturing cost increase
Solution Approach 1:
The patent extracts the high-capacity memory resource from the controller and places it in the host system's DRAM. This allows the controller to access programming parameters and threshold values from the host's abundant memory resources without investing power and circuitry in building large internal memory arrays, thus achieving high programming speeds with lower controller power consumption.
Solution Approach 2:
The host system acts as an intermediary between the memory controller and the non-volatile memory array. The host's DRAM serves as a buffer and parameter storage medium, enabling the controller to perform high-speed programming operations by retrieving parameters from the host memory through the existing communication interface, rather than maintaining large internal parameter stores.
3Productivity
If memory controllers store detailed information about each group of memory cells internally, then access efficiency improves, but the controller's memory requirements and device size increase
Solution Approach 1:
The patent extracts the detailed memory cell group information (threshold values, programming parameters, status data) from the controller's internal memory and stores it in the host system's DRAM. The controller accesses this information efficiently through the host interface when needed, achieving high access efficiency without requiring large internal memory capacity in the controller.
Solution Approach 2:
The patent moves the parameter storage from the controller's internal one-dimensional resource constraint to the host system's multi-dimensional resource space (host memory, host processor, host storage). This dimensional shift allows detailed information about all memory cell groups to be stored externally while maintaining fast access through the host-controller interface.
Data Source
AI summary
A method for data storage includes, in a system that includes a host having a host memory and a memory controller that is separate from the host and stores data for the host in a non-volatile memory including multiple analog memory cells, storing in the host memory information items relating to respective groups of the analog memory cells of the non-volatile memory. A command that causes the memory controller to access a given group of the analog memory cells is received from the host. In response to the command, a respective information item relating to the given group of the analog memory cells is retrieved from the host memory by the memory controller, and the given group of the analog memory cells is accessed using the retrieved information item.


