Memory Controller Interference Grouping for Read Accuracy
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In nonvolatile memory devices, interference from adjacent memory cells can alter the threshold voltage distribution, leading to incorrect data reading during programming operations, especially when using incremental step pulse programming methods.
Innovation Solution
A memory system with a controller that determines the programmed states of nearby memory cells, groups selected memory cells based on interference levels, and corrects data from groups with significant interference by adjusting the read voltage to accurately read data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If incremental step pulse programming method is used to increase programming speed, then programming operation speed is improved, but threshold voltage distribution becomes wide and data reading accuracy deteriorates
Solution Approach 1:
The patent applies preliminary action by performing a read operation before the programming operation to obtain an initial threshold voltage distribution. This preliminary measurement allows the system to predict and compensate for the wide threshold voltage distribution that will occur after incremental step pulse programming, thereby maintaining data reading accuracy despite the speed optimization technique.
Solution Approach 2:
The patent implements feedback by using the read operation results to adjust the programming process. The controller determines the threshold voltage distribution from the read operation and uses this information to compensate for interference effects during programming. This feedback mechanism ensures that data reading accuracy is maintained even when using fast incremental step pulse programming methods.
2Speed
If program voltage with great increase rate is used to program memory cells, then programming speed is improved, but interference from adjacent memory cells increases and data reading accuracy deteriorates
Solution Approach 1:
The patent performs a preliminary read operation to obtain the threshold voltage distribution of memory cells before programming. This preliminary action allows the system to identify memory cells that are susceptible to interference from adjacent cells, enabling targeted compensation strategies that mitigate the harmful interference effects while maintaining high programming speeds.
Solution Approach 2:
The system uses feedback from the read operation to determine the threshold voltage distribution and identify interference patterns. This feedback information is then used to adjust the programming process, compensating for the wide threshold voltage distribution caused by high-rate program voltage application and reducing the impact of adjacent cell interference.
3Speed
If threshold voltage distribution is widely distributed, then programming operation is faster, but data reading precision deteriorates due to overlap between programmed and erased states
Solution Approach 1:
The patent performs a preliminary read operation to measure the threshold voltage distribution before programming. This preliminary measurement allows the system to establish a baseline understanding of the memory cell characteristics, which is then used to compensate for the wide threshold voltage distribution that occurs during fast programming operations.
Solution Approach 2:
The patent changes the parameter of read voltage to compensate for the wide threshold voltage distribution. By adjusting the read voltage based on the threshold voltage distribution obtained from preliminary read operations, the system can accurately distinguish between programmed and erased states even when the threshold voltage distribution is widely spread due to fast programming methods.
Data Source
AI summary
A memory system and an operating method thereof are provided. The memory system includes a semiconductor memory device configured to perform a read operation and a controller configured to control the read operation of the semiconductor memory device, and the controller, by determining programmed states of memory cells located nearby selected memory cells, divides the selected memory cells into a plurality of groups depending on an amount of interference, and corrects data of one of the groups having a great amount of interference.