Memory Controller Interleaving for I/O Throughput

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Solution Overview

Problem

Current memory systems face inefficiencies in data input/output performance due to operational complexity and performance degradation, particularly in handling multiple memory dies and managing data storage locations, which affects stability and lifespan.

Innovation Solution

A memory system with a controller that performs correlation operations across multiple memory dies, allowing for interleaving data output and dynamically determining operation based on pending credits and data types, enabling efficient resource allocation and reduced overhead.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If interleaving operation is performed across multiple memory dies, then data input/output throughput is improved, but operational complexity increases

Engineering Contradiction:
Improvedata input/output throughputVSAvoidoperational complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The memory system is divided into multiple independent memory dies, each capable of handling data requests separately. The controller segments incoming data requests and distributes them to appropriate memory dies through multiple channels, enabling parallel processing and improving throughput while managing complexity through modular architecture

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a multi-dimensional addressing scheme that adds channel and die dimensions to the traditional memory address space. By organizing memory access across multiple dimensions (channels × dies), the system achieves higher throughput without proportionally increasing operational complexity, as the additional dimensions provide structured parallelism

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If correlation operation is performed on read requests, then data retrieval efficiency is improved, but overhead in operations increases

Engineering Contradiction:
Improvedata retrieval efficiencyVSAvoidoverhead in operations
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The controller performs correlation operations on read requests in advance, identifying and grouping data that can be retrieved together before actual read operations begin. This preliminary correlation reduces the total number of separate read operations needed, improving overall retrieval efficiency while the overhead is amortized across the batch of correlated requests

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system maintains continuous correlation operations on incoming read requests, constantly identifying opportunities to group data retrievals. This continuous process ensures that correlation overhead is smoothly distributed rather than creating discrete interruptions, maintaining steady data retrieval efficiency without significant overhead spikes

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If multiple memory dies are utilized for data storage, then capacity and performance are improved, but stability and lifespan may degrade

Engineering Contradiction:
ImproveperformanceVSAvoidstability and lifespan
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent merges multiple memory dies into a unified memory system managed by a single controller. The controller coordinates access across all dies, distributing wear and operational stress evenly throughout the system. This merging approach maintains high performance through parallel access while improving reliability by preventing any single die from becoming a failure point

Inventive Principle:
Principle #5Merging (Combining)

4Productivity

If dynamic determination of correlation operation is implemented, then operational efficiency is improved, but device complexity increases

Engineering Contradiction:
Improveoperational efficiencyVSAvoidcontrol logic complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The system implements dynamic determination of correlation operations based on real-time analysis of read request patterns and memory die availability. The controller adapts its correlation strategy dynamically, increasing correlation intensity when beneficial and reducing it when overhead would outweigh benefits, thereby optimizing operational efficiency while managing complexity through adaptive rather than static control logic

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11360898B2Apparatus and method for improving input/output throughput of memory system
Publication Date: 2022.06.14 SK HYNIX INC
  • US11360898B2 patent drawing
  • US11360898B2 patent drawing
  • US11360898B2 patent drawing

AI summary

This technology relates to a method and apparatus for improving I/O throughput through an interleaving operation for multiple memory dies of a memory system. A memory system may include: multiple memory dies suitable for outputting data of different sizes in response to a read request; and a controller in communication with the multiple memory dies through multiple channels, and suitable for: performing a correlation operation on the read request so that the multiple memory dies interleave and output target data corresponding to the read request through the multiple channels, determining a pending credit using a result of the correlation operation, and reading, from the multiple memory dies, the target data corresponding to the read request and additional data stored in a same storage unit as the target data, based on a type of the target data corresponding to the read request and the pending credit.