Memory Controller Interleaving for I/O Throughput
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory systems face challenges in minimizing complexity and performance degradation, maximizing memory device efficiency, and improving input/output throughput, especially in portable electronic devices where multiple memory dies are used without efficient interleaving operations.
Innovation Solution
A memory system with a controller that performs correlation operations on read requests across multiple memory dies via interleaving, dynamically determining when to perform these operations based on the number of requests and storage modes, thereby optimizing data processing and reducing resource usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If interleaving operation is performed on multiple memory dies, then input/output throughput is improved, but system complexity increases
Solution Approach 1:
The patent segments read requests into multiple groups and distributes them across multiple memory dies through interleaving operations. Each memory die handles a portion of the data transfer independently, allowing parallel processing and improving throughput while managing complexity through structured division of tasks
Solution Approach 2:
The controller dynamically determines whether to perform correlation operations based on the number of read requests and system state. This dynamic adaptation allows the system to optimize performance under varying conditions without requiring complex fixed structures, resolving the contradiction between throughput improvement and complexity increase
2Productivity
If correlation operation is performed on multiple read requests, then data processing efficiency is improved, but resource overhead increases
Solution Approach 1:
The controller performs correlation operations selectively rather than on all read requests. By applying correlation only when the number of read requests meets certain conditions, the system achieves improved data processing efficiency for relevant operations while avoiding unnecessary resource overhead from universal correlation processing
3Stability of the object's composition
If strict address allocation is used for interleaving, then data storage organization is improved, but operational flexibility deteriorates
Solution Approach 1:
The patent employs dynamic address allocation where the controller can flexibly determine physical locations for data storage without strict predetermined constraints. This allows the system to maintain organized data storage through correlation operations while adapting to varying operational requirements and memory die states
Data Source
AI summary
Disclosed is a memory system including a plurality of memory dies configured to store data in various storage modes; and a controller coupled with the plurality of memory dies via a plurality of channels and configured to perform a correlation operation on multiple read requests among a plurality of read requests received from a host so that the plurality of memory dies output plural pieces of data corresponding to the plurality of read requests via the plurality of channels in an interleaving way, wherein the controller is configured to determine whether to perform the correlation operation based on the number of read requests, and perform the correlation operation on the multiple read requests which are related to the same storage mode and different channels.