Memory Controller Status Prediction via Interrupt Signals
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Solution Overview
Problem
The existing memory systems face inefficiencies in status polling operations, which can increase power consumption and deteriorate performance due to either high frequency leading to increased power use or low frequency resulting in delayed detection of ready states.
Innovation Solution
The memory system incorporates a controller that issues first and second commands to the non-volatile memory, including a command for operation duration time, allowing it to measure and utilize pre-defined or actual operation duration times to predict completion, thereby reducing the need for frequent status polling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If status polling is performed at high frequency, then command execution status can be detected quickly, but power consumption increases
Solution Approach 1:
The memory device performs preliminary actions by proactively notifying the controller of operation completion status through interrupt signals and by providing duration time information that enables the controller to predict completion times. This eliminates the need for continuous polling and achieves fast status detection without increased power consumption.
Solution Approach 2:
The memory device implements feedback mechanisms by sending interrupt signals to the controller when operations complete and by providing duration time information. This feedback loop allows the controller to know the exact status without active polling, resolving the contradiction between fast detection and low power consumption.
2Use of energy by moving object
If status polling is performed at low frequency, then power consumption is reduced, but ready state detection is delayed
Solution Approach 1:
The memory device performs preliminary actions by proactively notifying the controller of operation completion status through interrupt signals and by providing duration time information that enables the controller to predict completion times. This eliminates the need for continuous polling and achieves fast status detection without increased power consumption.
Solution Approach 2:
The memory device implements feedback mechanisms by sending interrupt signals to the controller when operations complete and by providing duration time information. This feedback loop allows the controller to know the exact status without active polling, resolving the contradiction between fast detection and low power consumption.
3Measurement precision
If frequent status polling is performed, then command execution status can be confirmed accurately, but system performance deteriorates
Solution Approach 1:
The invention extracts the status notification function from the polling mechanism. Instead of the controller continuously checking status through polling, the memory device extracts and actively provides status information through interrupt signals and duration time notifications, eliminating the performance-deteriorating polling overhead while maintaining accurate status confirmation.
Solution Approach 2:
The memory device implements feedback mechanisms by sending interrupt signals to the controller when operations complete and by providing duration time information. This feedback loop allows the controller to know the exact status without active polling, resolving the contradiction between fast detection and low power consumption.
4Use of energy by moving object
If status polling is reduced in frequency, then power consumption decreases, but operation completion timing prediction becomes less accurate
Solution Approach 1:
The memory device performs preliminary actions by proactively notifying the controller of operation completion status through interrupt signals and by providing duration time information that enables the controller to predict completion times. This eliminates the need for continuous polling and achieves fast status detection without increased power consumption.
Solution Approach 2:
The memory device implements feedback mechanisms by sending interrupt signals to the controller when operations complete and by providing duration time information. This feedback loop allows the controller to know the exact status without active polling, resolving the contradiction between fast detection and low power consumption.
Data Source
AI summary
A memory system includes a non-volatile memory, and a controller configured to issue a first command requesting a first operation to the non-volatile memory and a second command to the non-volatile memory. The second command may be for requesting a duration time of the first operation or for requesting an execution stage of the first operation. In accordance with the information returned by the non-volatile memory in response to the second command, the controller issues a third command requesting a completion status of the first operation to the non-volatile memory. The first operation may be a data read operation, a data write operation, or a data erase operation.