3D Nonvolatile Memory Controller Layer Segmentation

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving high memory capacity, fast operation speed, and low power consumption while maintaining non-volatility, which limits their reliability and efficiency in various applications.

Innovation Solution

A nonvolatile memory module with a 3D structure comprising multiple memory chips and a module controller that operates in both memory and storage modes, allowing for efficient data storage and retrieval by controlling the operation of each memory cell array layer based on endurance levels and write operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple memory cell array layers are stacked in 3D structure, then memory capacity is increased, but operation speed and reliability deteriorate due to difficulty in managing multiple layers

Engineering Contradiction:
Improvememory capacityVSAvoidoperation reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory module divides multiple memory cell array layers into separate functional groups: some layers are designated as working memory for fast operations, while other layers serve as storage memory for data preservation. The controller segments memory management tasks by selectively activating appropriate layers based on operation type, preventing management complexity from degrading reliability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system dynamically selects and switches between different memory layers based on real-time operation requirements. The controller adjusts which layers are active for working memory versus storage memory functions, optimizing performance and reliability for each specific operation rather than using a fixed layer configuration

Inventive Principle:
Principle #15Dynamics

2Quantity of substance

If multiple memory cell array layers are stacked in 3D structure, then memory capacity is increased, but operation speed deteriorates due to complex layer management

Engineering Contradiction:
Improvememory capacityVSAvoidoperation speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The memory system segments layers into dedicated working memory layers and storage memory layers. Working memory layers are optimized for fast read/write operations, while storage layers handle data preservation. This segmentation allows the system to maintain high operation speeds by directing traffic to appropriate layer types rather than managing all layers uniformly

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The controller acts as an intermediary that manages layer selection and data routing between working memory layers and storage layers. By introducing this intelligent mediation layer, the system achieves fast operation speeds through optimized data paths while maintaining high memory capacity via multiple stacked layers

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If memory cell array layers are used for both working memory and storage memory, then device complexity is reduced, but reliability deteriorates due to wear from continuous write operations

Engineering Contradiction:
Improvedevice complexityVSAvoidendurance reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The system segments memory layers into working memory layers that handle frequent write operations and storage layers that preserve data. By separating these functions across different layers, continuous write operations do not degrade all layers uniformly, extending overall device endurance while maintaining relatively simple device architecture

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system periodically moves data between working memory layers and storage layers, allowing worn-out working memory layers to be retired or refreshed while data is preserved in storage layers. This discarding and recovering mechanism extends device lifespan by managing wear across multiple layers rather than allowing continuous degradation of a single layer

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS9799399B2Nonvolatile memory devices including controller for operating nonvolatile memory cell array layer in memory chip in one of memory mode and storage mode
Publication Date: 2017.10.24 SAMSUNG ELECTRONICS CO LTD
  • US9799399B2 patent drawing
  • US9799399B2 patent drawing
  • US9799399B2 patent drawing

AI summary

A nonvolatile memory module including a plurality of memory chips and a module controller on a printed circuit board (PCB) may be provided. Each of the plurality of memory chips may include a plurality of nonvolatile memory cell array layers stacked on a substrate in a three dimensional structure. The module controller may control operations of the plurality of memory chips. The module controller may operate each of the plurality of nonvolatile memory cell array layers included in each of the plurality of memory chips in one of a memory mode, in which a corresponding nonvolatile memory cell array layer is used as a working memory area that temporarily stores data for an operation of the nonvolatile memory module, and a storage mode, in which the corresponding nonvolatile memory cell array layer is used as a storage area that preserves data.