Memory Controller Link Identification via Parameter Setting

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Solution Overview

Problem

In the product testing process of data storage devices, there is a need for an effective link identification method to correctly determine the object connected to the transmission interface, as link identification errors can lead to incomplete testing processes.

Innovation Solution

A memory controller with a microprocessor is used to set a predetermined parameter to a specific value after powering up, and then performs a link flow to establish a transmission link via the host interface, identifying the object device based on attribute parameters associated with the link.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the chip under test is connected to different devices at different test phases, then the testing process can be completed, but link identification errors may occur causing testing process failure

Engineering Contradiction:
Improvetesting process completionVSAvoidlink identification accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by setting a predetermined parameter to a specific value before the link flow begins. This pre-configuration enables the host interface to correctly identify the object device (test device or host device) during the link establishment phase, preventing link identification errors that would otherwise cause testing process failure. The predetermined parameter is configured in advance to ensure proper link identification regardless of which device the chip connects to during different test phases.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If the transmission interface connects to different objects during testing, then various test items can be performed, but errors in connection identification prevent testing completion

Engineering Contradiction:
Improveconnection flexibilityVSAvoidconnection identification accuracy
Core Design Contradiction:
Adaptability or versatilityVSMeasurement precision

Solution Approach 1:

The patent implements feedback by using attribute parameters associated with the transmission link to identify the object device after the link flow is completed. The host interface receives feedback information through the link flow process, and the microprocessor uses this feedback (attribute parameters) to accurately determine whether the connected device is a test device or host device. This feedback mechanism maintains high connection identification accuracy despite the transmission interface connecting to different objects during various test phases.

Inventive Principle:
Principle #23Feedback

3Reliability

If a link identification method is implemented to avoid connection errors, then testing process reliability improves, but the system requires additional parameters and identification steps

Engineering Contradiction:
Improvetesting process reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies universality by using existing capability parameters of the host interface as the predetermined parameter for link identification. Instead of introducing entirely new identification mechanisms, the invention utilizes the existing parameter structure of the host interface, making the link identification function integrated into the normal link establishment process. This multi-functional approach improves testing process reliability while minimizing additional system complexity, as the same parameter serves both capability definition and identification purposes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11755439B2Memory controller, test device and link identification method
Publication Date: 2023.09.12 SILICON MOTION INC
  • US11755439B2 patent drawing
  • US11755439B2 patent drawing
  • US11755439B2 patent drawing

AI summary

A memory controller coupled to a memory device and configured to control access operations of the memory device includes a host interface and a microprocessor. The microprocessor is coupled to the host interface and configured to set a value of a predetermined parameter to a specific value after the memory controller powers up and start to perform a link flow to try to establish a transmission link via the host interface. The predetermined parameter is one of a plurality of capability parameters of the host interface and the predetermined parameter is related to reception of the host interface. After the link flow is completed, the microprocessor is further configured to identify an object device with which the host interface establishes the transmission link according to the specific value and at least one of a plurality of attribute parameters associated with the transmission link.