Memory Controller Link Recovery Background Operations

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Solution Overview

Problem

Existing memory controllers fail to efficiently manage link quality degradation and perform background operations during link recovery, leading to potential data loss and performance issues in storage devices.

Innovation Solution

A memory controller with a host interface that monitors link quality and performs recovery operations, and a background controller that manages background operations such as wear leveling and garbage collection during link recovery, ensuring continuous device performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory controller performs link recovery operation when link quality is degraded, then link quality is restored, but background operations such as wear leveling and garbage collection are delayed or interrupted

Engineering Contradiction:
Improvelink qualityVSAvoidbackground operation efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The memory controller performs background operations before initiating link recovery operations. By completing wear leveling, garbage collection, and other maintenance tasks in advance, the controller ensures that link recovery can proceed without interruption while maintaining storage device performance and preventing data loss.

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If the memory controller waits for link recovery to complete before performing background operations, then link stability is ensured, but device performance and operational efficiency deteriorate

Engineering Contradiction:
Improvelink stabilityVSAvoiddevice performance
Core Design Contradiction:
Stability of the object's compositionVSProductivity

Solution Approach 1:

The memory controller proactively completes background operations before link quality degradation becomes severe or before recovery operations are initiated. This preliminary execution of maintenance tasks ensures both link stability and continuous device performance, as the controller does not need to interrupt or delay background operations during link recovery.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The memory controller maintains continuous operation by executing background tasks before link recovery is needed, rather than pausing them during recovery. This approach ensures uninterrupted useful action, keeping both the link stable and the storage device performing optimally without idle periods.

Inventive Principle:
Principle #20Continuity of useful action

3Reliability

If the memory controller monitors link quality continuously and performs recovery operations promptly, then data loss is prevented, but processing overhead and system complexity increase

Engineering Contradiction:
Improvedata integrityVSAvoidcontroller complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory controller performs background operations in advance before link quality degradation threatens data integrity. This preliminary action reduces the need for complex real-time monitoring and intervention mechanisms, as the controller proactively maintains storage health before link issues arise, thereby preventing data loss with simpler system architecture.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11543999B2Memory controller and operating method thereof
Publication Date: 2023.01.03 SK HYNIX INC
  • US11543999B2 patent drawing
  • US11543999B2 patent drawing
  • US11543999B2 patent drawing

AI summary

A memory controller for controlling a memory device includes a host interface and a background controller. The host interface communicates with a host through a link, determines whether quality of the link has been degraded by monitoring the quality of the link, and performs a link recovery operation on the link when it is determined that the quality of the link is degraded. The background controller controls the memory device to perform a background operation, while the link recovery operation is being performed.