Memory Controller Logical Block Defect Distribution
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory systems with non-volatile memory face variability in random write performance due to differing numbers of defective blocks across multiple systems, leading to inconsistent data storage capabilities.
Innovation Solution
A memory system constructs logical blocks by distributing a first number of defective blocks and a second number of pseudo defective blocks, ensuring each system has a common target number of defective blocks, thereby reducing performance differences across systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If memory systems are manufactured with varying numbers of defective blocks, then manufacturing flexibility is improved, but random write performance consistency deteriorates
Solution Approach 1:
The patent changes the parameter of defective block distribution by introducing a target number T of defective blocks per memory system and controlling the number of defective blocks in each logical block to be within a specified range. This parameter control ensures that despite manufacturing variations, the random write performance remains consistent across different memory systems.
Solution Approach 2:
The patent performs preliminary classification and arrangement of defective blocks during the logical block construction phase. By pre-determining the distribution of defective blocks across logical blocks before actual data storage operations, the system ensures consistent performance characteristics without requiring post-manufacturing adjustments.
2Productivity
If defective blocks are concentrated in fewer logical blocks, then the number of usable logical blocks increases, but performance variability across systems worsens
Solution Approach 1:
The patent applies local quality by allowing different distributions of defective blocks across logical blocks while maintaining a controlled target number T. Each memory system can have its defective blocks localized in specific logical blocks according to its actual defect pattern, while the overall distribution follows the target number constraint to ensure consistent performance.
Solution Approach 2:
The patent introduces dynamic flexibility in the distribution strategy where the target number T and the range of defective blocks per logical block can be adjusted based on the actual defect rate and system requirements. This dynamic approach allows optimization of usable logical blocks while maintaining performance consistency.
3Quantity of substance
If the target number of defective blocks is increased, then more defective blocks can be utilized, but over-provisioning rate increases
Solution Approach 1:
The patent applies partial action by setting the target number T to include only the necessary number of defective blocks required for consistent performance, rather than utilizing all available defective blocks. This prevents excessive allocation of defective blocks to logical blocks, thereby controlling the over-provisioning rate while still achieving performance consistency.
Data Source
AI summary
According to one embodiment, there is provided a memory system including a non-volatile memory and a controller. The non-volatile memory includes a plurality of physical blocks. The controller is connected to any of the plurality of physical blocks via a plurality of channels. The controller is configured to construct a plurality of logical blocks and, read or write data from or into any of the plurality of logical blocks constructed. The logical blocks are management units in which any of the physical blocks is grouped across the plurality of channels. The controller is configured to construct the plurality of logical blocks so that a first number of defective blocks and a second number of pseudo defective blocks for shortfall defective blocks with respect to a target number of defective blocks are distributed into the plurality of logical blocks.