Memory Controller Low Power Mode for Stress Test Brownouts
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Solution Overview
Problem
Verification testing of memory devices, particularly during stress testing, causes excessive demand on the power supply, leading to brownouts and frequent reboots, which increases testing time and efficiency issues.
Innovation Solution
Implementing a low power mode in memory controllers that detects a decrease in power supply voltage during the boot phase, halting the oscillator circuit and powering down the processor core and internal memory to alleviate demand, and resuming operation when the power supply recovers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If stress testing is performed on multiple memory devices in parallel, then verification efficiency is improved, but power supply demand increases causing brownouts and reboots
Solution Approach 1:
The system dynamically adjusts the operational state of memory devices based on real-time power supply conditions. When brownout detection occurs, the system transitions devices from full operational mode to a reduced power mode, allowing them to continue booting with limited power consumption. This dynamic adaptation enables parallel stress testing to continue without complete system reboots, maintaining verification efficiency while managing power demand.
Solution Approach 2:
The patent changes the power consumption parameter of memory devices during the boot process by detecting brownout conditions and adjusting operational parameters. When a brownout is detected, the system modifies the power state of individual devices or groups of devices, allowing them to operate in a lower power consumption mode during the critical boot phase, thereby preventing system-wide brownouts and reboots.
2Power
If power supply voltage decreases during boot phase, then power demand must be reduced, but device functionality is limited
Solution Approach 1:
The system performs preliminary brownout detection during the boot phase before full operational power is required. By detecting voltage decreases early in the boot process, the system can proactively adjust power states and prevent complete power failures, ensuring devices transition smoothly into operational mode with adequate power supply.
Solution Approach 2:
The patent implements a feedback mechanism where the system continuously monitors power supply voltage during the boot phase. When a brownout condition is detected, this feedback triggers automatic adjustment of device power states, creating a closed-loop control system that maintains reliable operation by responding to power supply conditions in real-time.
Data Source
AI summary
A memory device comprises a memory array that includes memory cells and a memory controller operatively coupled to the memory array. The memory controller includes an oscillator circuit, internal memory, a processor core coupled to the oscillator circuit and the internal memory, and configured to load operating firmware during a boot phase of the memory device, voltage detector circuitry configured to detect a decrease in a circuit supply voltage of the memory controller during the boot phase, and logic circuitry configured to halt operation of the oscillator circuit and power down the processor core and the internal memory during the boot phase in a low power mode in response to detecting the decrease in the circuit supply voltage.