Memory Controller Data Integrity Check via MAC and CRC
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Solution Overview
Problem
Current semiconductor memory systems lack robust data authenticity and integrity check mechanisms, making them vulnerable to attacks like row hammer attacks, which can compromise data security and reliability.
Innovation Solution
Incorporating data authentication and integrity check capabilities using message authentication codes (MAC) and error detection mechanisms, such as cyclic redundancy checks (CRC), within the memory controller to ensure data reliability and protect against unauthorized changes, combined with cryptographic encryption like AES for enhanced security.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data authentication and integrity check capabilities are incorporated using MAC and CRC mechanisms, then data security and reliability are improved, but device complexity increases
Solution Approach 1:
The patent combines multiple security functions (authentication, integrity checking, error detection) into a unified memory controller architecture. The MAC generator and verifier, CRC encoder and decoder, and encryption modules are integrated into the existing memory device structure, allowing multiple security layers to work together without requiring separate independent systems.
Solution Approach 2:
The memory controller is designed to perform multiple security functions simultaneously - generating and verifying MAC codes, computing CRC checksums, encrypting data, and detecting errors all within the same device. This multi-functional approach allows a single component to provide comprehensive security protection while managing complexity through consolidation.
2Reliability
If cryptographic encryption like AES is implemented for enhanced security, then data confidentiality is improved, but processing time and energy consumption increase
Solution Approach 1:
The patent implements preliminary encryption of data before it is stored in memory, and preliminary verification of authentication codes and integrity checks before data is read. By performing these security operations in advance and during data transfer, the system ensures data confidentiality is maintained without requiring additional processing time during subsequent read/write operations.
Solution Approach 2:
The security operations are performed continuously during data transfer between the host and memory device. The MAC verification, CRC checking, and encryption/decryption operations occur as part of the normal data access workflow, ensuring that security measures do not create significant delays in data processing.
3Reliability
If multiple error detection and authentication mechanisms are added, then data integrity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent divides the security and error detection functions into distinct modular components within the memory controller. The MAC generator, MAC verifier, CRC encoder, and CRC decoder are implemented as separate functional blocks that can be independently designed, tested, and manufactured. This segmentation allows each component to be optimized for its specific function while simplifying the overall manufacturing process.
Data Source
AI summary
A memory system can be provided with error detection capabilities at various levels and authentication and integrity check capabilities in parallel with data security schemes. The error detection capabilities can check for any errors not only on data paths within a memory controller, but also on data stored in memory devices. The authentication capabilities provided in parallel with the data security schemes can ensure/strengthen data integrity of the memory system to be compliant with standardized requirements and/or protocols, such as trusted execution engine security protocol (TSP).