Memory Controller Map Cache Pool Timer Segmentation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The intensive flushing of map data in memory devices leads to temporary deterioration of read and write operation performance, failing to satisfy Quality of Service (QoS) for operations requested by hosts.

Innovation Solution

A memory system with a memory controller that configures multiple map cache pools and sets timers for flushing cached map data, distributing the flushing time points to prevent intensive flushing, thereby maintaining performance and satisfying QoS.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If map data is flushed intensively in the memory device, then the map data consistency is improved, but the read and write operation performance deteriorates

Engineering Contradiction:
Improvemap data consistencyVSAvoidread and write operation performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the map cache into multiple pools (first map cache pool, second map cache pool, etc.) and configures different timer settings for each pool. This segmentation allows map data to be flushed in distributed batches rather than all at once, maintaining data consistency while reducing the performance impact on read and write operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements periodic flushing of map data using timers configured for different map cache pools. Each pool has its own timer that triggers flush operations at different intervals, creating a periodic rather than continuous intensive flush pattern. This maintains map data consistency over time while allowing read and write operations to proceed with minimal interruption.

Inventive Principle:
Principle #19Periodic action

2Reliability

If map data is flushed frequently, then the QoS of read and write operations is improved, but the performance deterioration occurs due to intensive flushing

Engineering Contradiction:
ImproveQoS of read and write operationsVSAvoidoperation performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

By segmenting map cache into multiple pools with different timer configurations, the system can maintain QoS requirements for read and write operations while avoiding the performance penalty of frequent unified flushing. Each pool can be optimized independently based on its specific requirements.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different map cache pools can have different timer settings tailored to their specific characteristics and requirements. This local optimization allows critical map data to be flushed more frequently to maintain QoS, while less critical data can be flushed less frequently to preserve overall system performance.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11372766B2Memory system, memory controller, and method of operating memory system
Publication Date: 2022.06.28 SK HYNIX INC
  • US11372766B2 patent drawing
  • US11372766B2 patent drawing
  • US11372766B2 patent drawing

AI summary

Disclosed are a memory system, a memory controller, and a method of operating the memory system. The memory system may configure a plurality of map cache pools for caching map data of different types, respectively, within a map cache in which the map data is cached, configure a timer in a first map cache pool among the plurality of map cache pools, and write map data cached in the first map cache pool in the memory device based on the timer.