Memory Controller Map Caching for Read Performance

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Solution Overview

Problem

Current memory controllers face challenges in achieving optimal read performance due to limitations in managing mapping information between logical and physical addresses across volatile and nonvolatile memory devices, leading to inefficiencies in data retrieval.

Innovation Solution

A memory controller architecture that incorporates a map caching controller, a map buffer manager, and a mapping manager using a combination of a hash table and a map tree to efficiently allocate and manage physical slots for map segments, allowing for quick search and retrieval of physical addresses corresponding to logical addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If a hash table is used to store map segments for quick retrieval, then search speed is improved, but hash collisions occur reducing reliability

Engineering Contradiction:
Improvesearch speedVSAvoiddata retrieval reliability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent combines hash table and tree structure into a hybrid mapping manager. The hash table provides fast initial lookup while the tree structure (map tree with tree slots) resolves hash collisions and stores complete mapping information. This merging allows the system to achieve both fast search performance and reliable data retrieval by leveraging the strengths of both data structures.

Inventive Principle:
Principle #5Merging (Combining)

2Speed

If all map segments are stored in volatile memory for fast access, then read performance is improved, but memory capacity is limited and data is lost when power is cut

Engineering Contradiction:
Improveread performanceVSAvoidmemory capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The patent segments the mapping information into map segments that are selectively loaded into volatile memory physical slots. The mapping manager divides the complete mapping data (stored in nonvolatile memory) into manageable segments, loading only the most frequently accessed segments into volatile memory for fast access. This segmentation allows the system to work within limited volatile memory capacity while maintaining fast read performance for hot data.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system performs preliminary actions by pre-loading map segments into volatile memory based on prediction algorithms that anticipate future access patterns. The mapping manager proactively loads map segments into physical slots before they are actually needed, based on analysis of access patterns and prediction of future requests. This preliminary action reduces wait time and improves read performance by having data ready in volatile memory before it is requested.

Inventive Principle:
Principle #10Preliminary action

3Loss of information

If map segments are frequently updated in volatile memory, then data freshness is improved, but search costs increase due to managing updates across hash tables and tree structures

Engineering Contradiction:
Improvedata freshnessVSAvoidsearch cost
Core Design Contradiction:
Loss of informationVSLoss of time

Solution Approach 1:

The mapping manager acts as an intermediary between the hash table and the map tree, coordinating updates efficiently. When map segments need to be updated, the mapping manager manages the synchronization between these two data structures, ensuring data consistency while minimizing the overhead of updating both structures. This intermediary role reduces the search cost associated with managing updates by providing a centralized coordination point.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Device complexity

If a simple storage structure is used for map segments, then device complexity is reduced, but read performance deteriorates due to inefficient search mechanisms

Engineering Contradiction:
Improvemapping structure complexityVSAvoiddata retrieval speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent implements a dynamic mapping structure where the system adapts between different data organization methods based on access patterns. The mapping manager dynamically decides when to use the hash table for direct lookup versus when to traverse the map tree, and dynamically loads/unloads map segments from volatile to nonvolatile memory based on predicted access patterns. This dynamic approach optimizes read performance without requiring a permanently complex static structure.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS11487662B2Memory controller and storage device including the same
Publication Date: 2022.11.01 MIMIRIP LLC
  • US11487662B2 patent drawing
  • US11487662B2 patent drawing
  • US11487662B2 patent drawing

AI summary

The present technology relates to a memory controller according to an embodiment includes a map caching controller generating a slot allocation request to allocate a physical slot in which a first map segment is to be stored among a plurality of physical slots, a map buffer manager outputting the first map segment, first physical slot information, and tree slot information, in response to the slot allocation request, and a mapping manager receiving the first map segment, the first physical slot information, and the tree slot information, deleting a second map segment and second physical slot information stored in a tree slot among a plurality of tree slots of a map tree, and storing the first map segment and the first physical slot information in the tree slot. At least one of the second map segment and the second physical slot information stored in the tree slot is invalid.