Memory Controller Mapping Data Unit Labeling
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Solution Overview
Problem
Existing memory systems face inefficiencies in updating mapping data between memory devices and hosts, leading to suboptimal performance in read operations and frequent resource occupation.
Innovation Solution
A memory system with a memory controller that divides a subregion storing mapping data into data units, labels units when mapping data changes, and determines whether to trigger an update in a corresponding host subregion based on the number of labeled units, using a bit map to manage data unit validity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If mapping data is updated frequently in the host to ensure data consistency, then data accuracy is improved, but system resource occupation increases and read operation performance deteriorates
Solution Approach 1:
The patent divides the first subregion storing mapping data into multiple data units, and divides the second subregion in the host into corresponding data units. This segmentation allows the system to track and update only specific data units that have changed, rather than updating the entire mapping data structure. The bit map further segments the tracking mechanism into individual bit-level granularity for each data unit, enabling precise validity management.
Solution Approach 2:
The patent implements local quality by applying different validity states to different data units within the mapping data structure. Each data unit can independently be marked as valid or invalid through the bit map, allowing the system to maintain high-quality (accurate) data in unchanged units while efficiently updating only the local units that have changed. This prevents unnecessary propagation of validity changes across the entire mapping structure.
2Measurement precision
If mapping data update threshold is set low to ensure data consistency, then data accuracy is improved, but update frequency increases and system resources are occupied more frequently
Solution Approach 1:
The patent implements a dynamic update threshold mechanism where the threshold can be adjusted based on system conditions and data change patterns. The threshold is not fixed but adapts to balance between data consistency requirements and resource consumption. This allows the system to be more aggressive in updates when consistency is critical and more conservative when resource efficiency is prioritized.
Solution Approach 2:
The patent changes the parameter of update threshold from a static value to a dynamically adjustable parameter. By modifying this parameter based on system state, data access patterns, and resource availability, the system can optimize the balance between maintaining data consistency and minimizing unnecessary update operations that consume system resources.
3Measurement precision
If the entire first subregion is divided into data units for fine-grained validity management, then validity management accuracy is improved, but device complexity increases
Solution Approach 1:
The patent extracts the validity tracking functionality from the main mapping data structure by introducing a separate bit map. This extraction allows the fine-grained tracking of individual data unit validity without embedding complex validation logic within the mapping data itself. The bit map serves as a dedicated, simplified structure that complements the mapping data without increasing its inherent complexity.
Solution Approach 2:
The bit map acts as an intermediary structure between the mapping data and the validity management logic. Instead of directly managing the complexity of tracking validity for each data unit within the mapping structure itself, the system uses the bit map as a mediator that simplifies the interface and reduces the complexity burden on the main mapping data structure.
Data Source
AI summary
A memory system includes: a memory device and a memory controller coupled with the memory device, wherein the memory device includes a plurality of first subregions storing mapping data; the memory controller is coupled with a host; the host includes a plurality of second subregions corresponding to the plurality of first subregions; the mapping data includes a logical address to physical address mapping relationship; logical address ranges of mapping data stored in a first subregion and a second subregion corresponding to each other are the same; the memory controller is configured to: divide the first subregion into a plurality of data units; when mapping data in a data unit is changed, label the data unit; and based on the number of the labeled data units in the first subregion, determine whether to trigger an update of mapping data in the second subregion corresponding to the first subregion.