Memory Controller Multi-Processor Mapping Search Optimization
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Solution Overview
Problem
The performance of memory systems is degraded due to the time-consuming processing of commands and search for mapping information between logical and physical addresses, which affects read and write operations.
Innovation Solution
A memory system with multiple processors is implemented, where one processor handles read operations and another processor handles write operations, using separate map search engines to efficiently search for mapping information, and a third processor can process background operations, thereby improving the search performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a single processor is used to process both read and write operations and search for mapping information, then the device complexity is low, but the processing speed and search performance are degraded
Solution Approach 1:
The patent divides the single processor into multiple specialized processors: a first processor dedicated to read operations and mapping information search, a second processor for write operations, and optionally a third processor for background operations. This segmentation allows each processor to specialize in specific tasks, improving overall search speed and processing efficiency while maintaining manageable system complexity through clear functional division.
2Loss of time
If firmware processes all commands sequentially, then the device complexity is low, but the loss of time in processing commands increases
Solution Approach 1:
The patent segments the sequential firmware processing into parallel processor operations. The first processor handles read commands and mapping searches simultaneously, while the second processor handles write commands, and the third processor manages background operations. This parallel architecture dramatically reduces command processing time by eliminating sequential bottlenecks.
Solution Approach 2:
The first processor performs mapping information search in advance and maintains a mapping table in fast memory, so that when read commands arrive, the mapping information is already prepared and immediately available. This preliminary action eliminates the need for time-consuming mapping searches during actual read operations.
3Productivity
If mapping information search is performed during read operations, then the system functionality is complete, but the productivity of read operations is reduced
Solution Approach 1:
The patent separates the mapping information search function from the read operation execution by dedicating the first processor exclusively to mapping searches and the maintenance of a mapping table in fast memory. This segmentation allows read operations to proceed without waiting for mapping searches, as the mapping information is pre-loaded and immediately accessible, thereby improving read operation throughput while eliminating mapping search delays.
Data Source
AI summary
A memory system, a memory controller, and an operating method therefor. The memory system includes a first processor configured to determine a processor, among multiple processor including the first processor, to process read operations on logical addresses indicated by read commands, and process a write operation on a logical address indicated by a write command; and a second processor, among the multiple processors, configured to process a read operation on a target logical address selected by the first processor among the logical addresses. The first processor searches for mapping information on a logical address corresponding to a read or write operation to be processed by the first processor, by using a first map search engine, and the second processor searches for mapping information on the target logical address by using a second map search engine. It is possible to improve the performance of searching for mapping information in a read operation.