Memory Controller Mapping Table Compression for Write Speed
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Solution Overview
Problem
Existing data storage devices face challenges in optimizing write operations to enhance access performance, particularly in managing mapping tables to efficiently record and retrieve data across multiple memory blocks and pages.
Innovation Solution
A data storage device and method utilizing a memory controller that maintains multiple mapping tables to record logical to physical page mappings, allowing for efficient editing and management of mapping information by selectively skipping updates to certain tables based on consecutive page records, thereby speeding up write operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory controller edits the second mapping table for every full memory block, then mapping information is kept up-to-date, but write operation speed decreases due to frequent editing
Solution Approach 1:
The patent applies partial action by selectively updating the second mapping table only when necessary (when consecutive logical page addresses are detected), rather than updating it for every full memory block. This reduces the frequency of editing operations while maintaining mapping accuracy where needed.
Solution Approach 2:
The patent implements local quality by introducing a third mapping table that stores representative mapping information for groups of consecutive logical pages. This allows different parts of the mapping system to have different update frequencies and granularities, with the third table providing compressed representation for sequential data.
2Measurement precision
If the memory controller maintains detailed mapping information for all logical pages, then data retrieval accuracy is improved, but memory usage and processing complexity increase
Solution Approach 1:
The patent merges the functionality of multiple mapping tables by introducing a third mapping table that consolidates representative mapping information. This combines the detailed tracking of the second mapping table with compression, reducing overall system complexity while maintaining retrieval accuracy through the group-based representation approach.
Solution Approach 2:
The patent creates a simplified copy of mapping information in the third mapping table, storing representative data for groups of consecutive logical pages rather than individual page mappings. This copy provides sufficient information for most operations while reducing the complexity and size of the mapping structure.
Data Source
AI summary
A data storage device includes a memory device and a memory controller. The memory controller selects a predetermined memory block to receive data and accordingly records multiple logical addresses in a first mapping table. When the predetermined memory block is full, the memory controller edits a second mapping table or a third mapping table based on the first mapping table. The memory controller determines whether the first mapping table has recorded logical addresses of a predetermined number of consecutive logical pages. If not, the memory controller edits the second mapping table. If so, the memory controller skips editing the second mapping table and edits the third mapping table instead, so as to record the mapping information of a predetermined logical page among the predetermined number of consecutive logical pages as representative mapping information in a corresponding field of the third mapping table.