Memory Controller Mapping Table for Data Storage Program Sequence
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Solution Overview
Problem
Existing data storage apparatuses face challenges in managing program sequences and handling failed program operations efficiently, particularly due to differences in data transfer speeds between devices.
Innovation Solution
A data storage apparatus is designed with a storage device, a buffer memory device, and a memory controller. The memory controller temporarily stores write data and a mapping table in the buffer memory, maps logical addresses to physical addresses, and updates mapping information by allocating new physical addresses when a program operation fails, allowing for selective reprogramming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a buffer memory is used to temporarily store write data, then data transfer speed bottleneck is reduced, but program sequence management becomes more complex
Solution Approach 1:
The mapping table serves as an intermediary structure between logical addresses and physical addresses. It stores mapping information that tracks which physical address corresponds to which logical address, enabling the memory controller to manage program sequences without direct complex coordination between all components. This intermediary structure simplifies the management of write operations while maintaining high data transfer speeds.
2Reliability
If mapping information is updated when program fails, then reliability is improved, but operation time increases
Solution Approach 1:
The system implements feedback by monitoring program operation results and using this information to update mapping tables. When a program operation fails, the feedback mechanism triggers mapping information updates to redirect to alternative physical addresses. This feedback loop ensures reliability while minimizing time loss by only updating mappings when necessary, rather than continuously monitoring all operations.
3Reliability
If failed program operations are selectively reperformed, then data integrity is improved, but processing complexity increases
Solution Approach 1:
The mapping table is segmented into multiple entries, each tracking individual program operations separately. This segmentation allows the system to identify and reperform only the specific failed program operations without affecting other successful operations. The buffer manager divides write operations into discrete units that can be independently managed and retried, reducing overall processing complexity while maintaining data integrity.
Data Source
AI summary
A data storage apparatus may include a storage device; a buffer memory device configured to temporarily store write data and a mapping table; and a memory controller configured to control the storage device to program the write data. The memory controller is configured to when externally receiving write commands including a logical addresses, store the logical addresses by mapping the logical addresses to physical addresses sequentially stored in the mapping table in a sequence in which the write commands are received, and when a program operation corresponding to a first write command fails, invalidate first mapping information corresponding to the first write command and update the first mapping information by allocating a new physical address to a logical addresses including the first write command in response to a reprogram command generated with respect to the first write command.