Memory Controller Mapping Tables for Random Read Performance
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Solution Overview
Problem
Current memory systems face inefficiencies in read performance, particularly when handling pseudo-random data, due to the fragmentation of logical addresses leading to non-sequential access patterns, which hampers parallel processing and increases latency.
Innovation Solution
The memory system employs a controller that manages memory regions with sequential and random attributes, using Logical-to-Physical (L2P) and Physical-to-Logical (P2L) tables to optimize read operations by identifying sequential physical addresses corresponding to random read requests, enabling parallel processing and improving read performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the memory system uses traditional L2P mapping for random writes, then data can be stored in random memory locations, but read performance deteriorates due to non-sequential access patterns and inability to perform parallel reads
Solution Approach 1:
The patent divides the mapping information into two separate tables: L2P table for logical-to-physical mapping and P2L table for physical-to-logical mapping. This segmentation allows the system to maintain random write capability through L2P while enabling sequential read optimization through P2L by grouping physical addresses that are sequentially adjacent.
Solution Approach 2:
Instead of only maintaining L2P mapping (logical to physical) for read operations, the patent introduces P2L mapping (physical to logical) as an inverse structure. This inversion enables the system to start from physical addresses and identify sequential relationships, thereby enabling parallel read operations for randomly written data.
2Measurement precision
If the memory system processes random read requests individually, then each request can be handled accurately, but processing time increases due to lack of parallel processing capability
Solution Approach 1:
The patent performs preliminary grouping of physical addresses using the P2L table before executing read operations. By pre-identifying which physical addresses are sequentially adjacent and correspond to pending read requests, the system prepares the groundwork for parallel processing, thereby reducing actual read latency while maintaining request accuracy.
Solution Approach 2:
The patent merges multiple individual read requests into a single parallel read operation by identifying that they correspond to sequentially adjacent physical addresses. This combining of requests maintains the accuracy of individual address access while achieving time efficiency through parallel execution of merged requests.
3Adaptability or versatility
If the memory system loads mapping tables frequently to handle random accesses, then random read capability is maintained, but system efficiency decreases due to repeated table loading operations
Solution Approach 1:
The patent maintains the P2L table in memory continuously updated during write operations, eliminating the need for frequent table loading. The P2L table is incrementally updated as data is written, allowing the system to maintain random access capability while avoiding the performance penalty of repeated full table loads.
Solution Approach 2:
The P2L table automatically updates itself during write operations without requiring external intervention or frequent reloading. As data is written to random locations, the corresponding physical addresses and their sequential relationships are recorded in the P2L table, making the mapping information self-maintaining and eliminating inefficient table loading cycles.
Data Source
AI summary
A memory system includes a storage medium and a controller. The storage medium includes a plurality of memory regions. The controller stores data corresponding to a write request into a memory region of a random attribute or a memory region of a sequential attribute among the memory regions and to update logical-to-physical (L2P) information corresponding to the stored data, and updates, when storing the data into the memory region of the random attribute, physical-to-logical (P2L) information corresponding to the stored data within a P2L table of the memory region of the random attribute.