Memory Controller MBIST Mirror Module Segmentation

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Solution Overview

Problem

The execution of memory built-in self-test (MBIST) and memory built-in self-test post package repair (mPPR) in DRAM systems is time-consuming, leading to delayed normal operation and a need for improved reliability and availability in memory systems.

Innovation Solution

A memory controller that enables partial performance of MBIST on a mirror memory module within a system running state, allowing for simultaneous normal operation and reduced time for MBIST and mPPR execution by mirroring data and executing tests on redundant memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If MBIST and mPPR are performed on memory modules, then reliability is improved, but system operation time is increased

Engineering Contradiction:
Improvememory reliabilityVSAvoidMBIST execution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent divides the memory system into two separate modules: a primary memory module for normal data storage and a mirror memory module dedicated to MBIST and mPPR operations. This segmentation allows the test operations to be performed on the mirror module without blocking normal system operations on the primary module, thereby reducing the time loss while maintaining reliability improvement.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The mirror memory module is pre-configured with the same data as the primary module before MBIST execution. This preliminary action enables the MBIST to be performed on already-copied data in the mirror module, allowing normal system operations to continue uninterrupted on the primary module while tests run in parallel on the mirror module.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If MBIST is performed on memory modules, then manufacturing precision is improved, but productivity is reduced

Engineering Contradiction:
Improvememory defect detectionVSAvoidsystem operation speed
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

By separating the memory system into primary and mirror modules with distinct functions, the patent enables defect detection operations to occur on the mirror module without impeding the productivity of the primary module. The system can maintain full operational speed while the mirror module undergoes thorough testing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent creates a copy of the memory data in the mirror memory module. This copying enables the MBIST to perform comprehensive manufacturing precision checks on the mirror copy while the primary module continues to serve productivity-critical operations without interruption.

Inventive Principle:
Principle #26Copying

3Reliability

If mirror memory modules are used for data redundancy, then reliability is improved, but device complexity is increased

Engineering Contradiction:
Improvedata redundancyVSAvoidmemory system structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The mirror memory module serves multiple functions: it acts as a data redundancy copy for reliability, a test target for MBIST operations, and a non-intrusive component that doesn't block primary module operations. This multi-functionality justifies the added device complexity by delivering multiple benefits from a single additional module.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The mirror memory module independently handles MBIST and mPPR operations without requiring the primary module to stop or intervene. This self-service capability reduces the operational complexity of coordinating tests across the system, as the mirror module autonomously performs testing while the primary module continues normal operations.

Inventive Principle:
Principle #25Self-service

Data Source

PatentEP4394776A1Memory controller, mirrored memory modules and associated built-in self-test
Publication Date: 2024.07.03 SAMSUNG ELECTRONICS CO LTD
  • EP4394776A1 patent drawingFigure 1
  • EP4394776A1 patent drawingFigure 2
  • EP4394776A1 patent drawingFigure 3

AI summary

A memory system including: a memory module including a plurality of memory chips; a mirror memory module including a plurality of mirror memory chips corresponding to the plurality of memory chips, a first mirror memory chip of the plurality of mirror memory chips being configured to store the same data as a first memory chip of the plurality of memory chips; and a memory controller configured to, in a system running state in which an operation according to a request of a user is capable of being performed after the memory system is booted, provide the memory module with a command for instructing a normal operation to be performed and provide the mirror memory module with a command for instructing a memory built-in selftest (MBIST) to be performed.