Memory Controller ML Decoder for NVM Data Synchronization
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Solution Overview
Problem
In non-volatile memory systems like NAND Flash, inter-cell interference (ICI) causes broadened voltage distributions, leading to increased raw bit error rates due to capacitive coupling between neighboring cells, which traditional constrained coding cannot effectively address without requiring level information, resulting in higher read latency and error propagation.
Innovation Solution
A modified constrained code that does not need level information for decoding all pages, reducing average read latency and eliminating error propagation by using a maximum-likelihood decoder to estimate insertion, deletion, or error locations in the reconstructed bit-stream, thereby synchronizing data efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional constrained coding is used to address inter-cell interference, then error correction capability is improved, but read latency increases and error propagation occurs due to requiring level information
Solution Approach 1:
The patent extracts and removes the requirement for level information from the decoding process. The modified constrained code is designed to work without level information, eliminating the source of the problem while preserving error correction capabilities through the maximum-likelihood decoder that operates on bit-level data only.
Solution Approach 2:
The patent changes the operating parameters of the constrained coding system by modifying the code structure to not depend on level information. This parameter change allows the system to achieve both low read latency and error correction capability by operating in a different regime where level information is not required for synchronization or decoding.
2Reliability
If traditional constrained coding requires level information for decoding, then error correction is improved, but device complexity increases due to need for additional information storage and processing
Solution Approach 1:
The patent removes the requirement for level information from the decoding process. The modified constrained code achieves error correction without needing to store or process level information, thereby reducing device complexity while maintaining reliability through the maximum-likelihood decoder operating on bit-level data.
Solution Approach 2:
The patent uses a maximum-likelihood decoder that creates a reconstructed version of the bit-stream and compares it with the received data to detect and correct errors. This copying and comparison approach enables error correction without requiring the original level information, simplifying the decoding process.
3Productivity
If conventional decoding is used without synchronization, then processing speed is improved, but data integrity deteriorates due to insertion and deletion errors from ICI
Solution Approach 1:
The patent performs preliminary synchronization by reconstructing the bit-stream and detecting insertion and deletion errors before the main decoding process. This preliminary action prevents error propagation during subsequent processing, maintaining both high processing speed and data integrity by correcting synchronization issues upfront.
Solution Approach 2:
The patent implements a feedback mechanism where the maximum-likelihood decoder reconstructs the bit-stream, compares it with the received data, and uses the detected errors to correct synchronization issues. This feedback loop ensures data integrity is maintained while allowing fast processing by preventing error propagation.
Data Source
AI summary
Described herein are apparatus, system, and method for data synchronization via a maximum-likelihood decoder in a memory controller. The method comprises receiving a constrained codeword from a non-volatile memory (NVM) via a channel, the constrained codeword including an appended bit-stream; and decoding the received constrained codeword by reconstructing the appended bit-stream and invoking a synchronization procedure that applies a maximum-likelihood (ML) estimator to estimate locations of any insertion, deletion, or error in the reconstructed appended bit-stream.