Memory Controller Mode Switching for Sparse I/O Power Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices face challenges in optimizing power consumption due to sparse I/O requests, as the time intervals between commands are too small for entering sleep mode, leading to excessive power consumption and degradation of host devices.
Innovation Solution
A method and memory controller that dynamically switch the operating mode of the storage device between striping FTL mode and a scaled down mode based on the time interval between requests, transitioning cores from active to power down states to conserve power.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the storage device uses striping FTL mode to handle sparse I/O requests, then the commands can be distributed to available flash cores, but the flash cores consume major chunk of power and cannot be switched off
Solution Approach 1:
The patent implements dynamic switching between two operating modes: striping FTL mode for high command processing capability and scaled down mode for low power consumption. The system transitions between these modes based on the time interval between I/O requests, allowing the flash cores to be switched off when not needed while maintaining the ability to handle sparse commands efficiently when required.
2Use of energy by moving object
If the storage device switches to scaled down mode to reduce power consumption, then flash cores can be powered down, but the time interval between commands must be sufficient to allow switching
Solution Approach 1:
The memory controller monitors the time interval between I/O requests in advance and proactively switches to scaled down mode when the interval exceeds the threshold, before power consumption becomes excessive. This preliminary action allows the system to prepare for low-power operation while ensuring commands are still processed timely.
3Use of energy by moving object
If the storage device uses deep sleep mode to save power, then power consumption is reduced, but the time interval between commands must be enough to enter and wake from sleep mode
Solution Approach 1:
Instead of using deep sleep mode that requires significant transition time, the patent employs a lighter-weight power saving approach where flash cores are simply powered down (disposed of) when not needed. This disposable approach to power management allows rapid switching without the overhead of deep sleep mode, effectively handling sparse I/O requests with minimal time loss.
Data Source
AI summary
There is provided a method and memory controller for managing memory operations in storage device. The memory controller receives plurality of requests from a user. The memory controller switches operating mode of storage device dynamically based on time interval between each of the plurality of requests and predefined threshold. The switching comprises notifying first cores to switch second cores from active state to power down state while switching to scaled down mode and restarting second cores while switching to striping FTL mode. Thereby, managing memory operations of storage device. Thus, the present disclosure manages the memory operations and optimises power consumption of the storage device.