Memory Controller Multi-Plane Read Balancing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional garbage collection processes in memory systems are inefficient due to their inability to effectively utilize multi-plane read operations, leading to prolonged read times and varying performance across channels.

Innovation Solution

A memory controller with a valid page information management unit, write buffer, and garbage collection control unit that manages valid pages and executes multi-plane reads to level the total number of valid pages read from each channel, using a solution space matrix to optimize read task scheduling and equalize read times across channels.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional garbage collection processes are used, then the process can be executed, but read times are prolonged and performance varies across channels

Engineering Contradiction:
Improvegarbage collection efficiencyVSAvoidread time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements dynamic read task scheduling that adapts to the actual state of each channel. The controller dynamically adjusts the number of read tasks assigned to each channel based on real-time feedback about channel status, valid page distribution, and multi-plane read capabilities, rather than using static allocation. This dynamic approach optimizes garbage collection efficiency while balancing read times across channels.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of read task allocation from fixed to variable based on channel conditions. By monitoring parameters such as the number of valid pages in each channel, multi-plane read availability, and current read task status, the system adjusts the allocation parameters dynamically. This parameter change enables the system to exploit multi-plane read operations more effectively while maintaining balanced performance across channels.

Inventive Principle:
Principle #35Parameter changes

2Speed

If multi-plane read operations are utilized, then read efficiency can be improved, but performance varies across channels

Engineering Contradiction:
Improveread speedVSAvoidperformance consistency
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent implements a feedback mechanism where the controller continuously monitors the status of each channel, including the number of valid pages, multi-plane read capability, and current read task progress. Based on this feedback, the controller dynamically adjusts the allocation of read tasks to each channel. This feedback loop ensures that channels with better multi-plane read availability receive more read tasks, optimizing overall read speed while the feedback-driven balancing prevents excessive variation in performance across channels.

Inventive Principle:
Principle #23Feedback

3Productivity

If read tasks are distributed across channels, then throughput can be increased, but read times become unbalanced

Engineering Contradiction:
ImprovethroughputVSAvoidread time variation
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The patent uses dynamic read task allocation that responds to real-time channel conditions. The controller continuously monitors the number of valid pages and multi-plane read status in each channel, then dynamically adjusts the number of read tasks assigned to each channel. This dynamic allocation increases overall throughput by utilizing all channels effectively while preventing excessive read time variation by adjusting allocations based on current channel capabilities and load.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the read task allocation parameter from static to dynamic based on channel state. The system monitors parameters such as valid page count, multi-plane read availability, and current read progress, then adjusts the allocation parameter accordingly. This parameter change enables the system to maximize throughput by utilizing all channels while maintaining balanced read times through adaptive adjustment of allocation parameters.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9189389B2Memory controller and memory system
Publication Date: 2015.11.17 KIOXIA CORP
  • US9189389B2 patent drawing
  • US9189389B2 patent drawing
  • US9189389B2 patent drawing

AI summary

A memory controller having a plurality of channels according to an embodiment of the present invention includes: a valid page information management unit that manages, for each of the channel, identification information of a valid page; a write buffer that stores data to be written to the memory; a garbage collection control unit that executes a garbage collection process; and a channel controller capable of executing multi-plane read. The garbage collection control unit controls multi-plane read of the channel controller based on the identification information to level a total number of valid pages read from each of the channel.