Memory Controller Namespace Trimming for Accurate Valid Data Tracking

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Solution Overview

Problem

Existing memory systems face challenges in efficiently managing and reporting the amount of valid data stored in non-volatile memory, particularly in NAND flash memory, due to the lack of effective methods for tracking and invalidating data, which affects performance and resource utilization.

Innovation Solution

A memory system with a memory controller that allocates logical addresses in units of namespace allocation, valid cluster count, and segments, using trim bits to manage data validity and perform trim processing, while maintaining accurate counts of valid data and responding to host commands.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the memory system uses traditional methods to track valid data in NAND flash memory, then the basic storage function is maintained, but the efficiency of managing and reporting valid data amount is insufficient

Engineering Contradiction:
Improveefficiency of managing and reporting valid dataVSAvoidtime for tracking and invalidating data
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the memory space into namespaces, where each namespace independently manages its valid data. The memory controller divides the large address space into multiple manageable namespaces, allowing parallel tracking and validation operations across different namespaces, thereby improving overall management efficiency and reducing time loss.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary mechanism (the memory controller with trim bit management) that mediates between the host and the non-volatile memory. This intermediary efficiently tracks valid data locations and manages invalidation operations, reducing the time burden on both the host and the memory subsystem while improving overall productivity in valid data management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the memory system implements detailed tracking of valid data at granular levels, then the accuracy of valid data management is improved, but the complexity of the system increases

Engineering Contradiction:
Improveaccuracy of tracking valid dataVSAvoidcomplexity of managing data validity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the memory into namespaces and further into logical units, allowing precise tracking of valid data at appropriate granularity levels without requiring complex management of every single memory cell. This hierarchical segmentation achieves measurement precision while controlling system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local quality by allowing each namespace to have its own valid data tracking mechanisms and management policies. This enables customized, efficient tracking methods for different namespaces based on their specific requirements, achieving high accuracy without uniformly increasing complexity across the entire system.

Inventive Principle:
Principle #3Local quality

3Measurement precision

If the memory system performs frequent validation and trimming operations, then the accuracy of valid data reporting is improved, but the performance overhead increases

Engineering Contradiction:
Improveaccuracy of valid data reportingVSAvoidperformance overhead of trim operations
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent implements periodic action by performing validation and trimming operations at scheduled intervals or based on specific triggers (such as namespace allocation changes), rather than continuously or excessively frequently. This maintains accurate valid data reporting while minimizing performance overhead by avoiding unnecessary operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The memory controller performs self-service by automatically managing valid data tracking and trim operations without requiring constant host intervention. This reduces performance overhead by handling validation tasks autonomously and efficiently, maintaining accuracy without burdening the overall system performance.

Inventive Principle:
Principle #25Self-service

4Adaptability or versatility

If the memory system allocates logical addresses in fine-grained units, then the flexibility of memory management is improved, but the overhead of managing address allocation increases

Engineering Contradiction:
Improveflexibility of namespace allocationVSAvoidoverhead of address allocation management
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the address space into namespaces with hierarchical structures, allowing flexible allocation at appropriate granularity levels. This segmentation enables adaptable memory management for different applications while avoiding the overhead of managing every individual address, as the hierarchical structure abstracts away fine-grained details.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The namespace allocation mechanism is designed with multi-functionality, serving both as a flexible address management unit and as a container for valid data tracking. This universal approach allows the same structure to provide both adaptability in allocation and simplified management, reducing overhead while maintaining flexibility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12554636B2Memory system and method of controlling memory system
Publication Date: 2026.02.17 KIOXIA CORP
  • US12554636B2 patent drawing
  • US12554636B2 patent drawing
  • US12554636B2 patent drawing

AI summary

According to one embodiment, a memory system includes: a non-volatile memory; and a memory controller configured to allocate a logical address range to a namespace in a first unit and release the logical address range from the namespace in the first unit. The first unit includes one or more second units, and each of the one or more second units includes a plurality of third units. The memory controller, in response to a first command from a host giving an instruction on invalidation of data stored in a first logical address range designating one or more of the third units, is configured to: invalidate the data for each of the one or more third units; and manage, for each of the one or more second units, a first count that is a number of third units in which valid data is stored among the plurality of third units.