Memory Controller Dual-Mode Near Memory Access
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Solution Overview
Problem
Conventional two-level memory (2LM) systems waste NM capacity as it is either not usable by the system or only visible as a memory-side-cache, leading to increased cost of ownership and inefficient memory utilization, where NM is smaller and faster, but FM is larger and slower, and the NM capacity has no direct value return.
Innovation Solution
Implementing a memory controller that allows NM to be used as both memory-side-cache and directly accessed memory, exposing the total memory capacity to the OS, with logic to encode tags for data location and swap data between NM and FM based on access requests, thereby utilizing the NM capacity effectively and increasing overall memory visibility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If NM is used only as memory-side-cache in conventional 2LM systems, then cache performance is improved, but NM capacity is wasted and not directly accessible by the system
Solution Approach 1:
The patent makes NM serve dual functions: it acts as both a memory-side-cache for FM and as directly accessible system memory. The memory controller implements logic to distinguish between cache operations and direct memory access operations, allowing the same physical memory resources to fulfill multiple roles simultaneously, thereby eliminating waste while preserving performance benefits.
Solution Approach 2:
The system dynamically switches between two operational modes for NM: cache mode when serving FM requests, and direct access mode when responding to system memory requests. This dynamic functionality allows NM to adapt its role based on access patterns, maximizing both cache performance and usable capacity without compromising either function.
2Quantity of substance
If NM capacity is increased to provide more direct-access memory, then total memory capacity is improved, but cost of ownership increases
Solution Approach 1:
Instead of purchasing separate NM resources for direct access and cache functions, the patent makes a single NM resource perform both roles. This eliminates the need for additional memory purchases, reducing cost of ownership while providing both direct-access capability and cache functionality from the same physical infrastructure.
3Device complexity
If the memory system exposes only FM capacity to the OS, then system complexity is reduced, but total memory capacity utilization is inefficient
Solution Approach 1:
The memory controller serves as an intermediary between the OS and the unified memory space. It translates OS memory requests into appropriate operations: direct access to NM when the target is in near memory, or cache-mediated access to FM when the target is in far memory. This abstraction layer shields the OS from the complexity of the dual-mode memory architecture while enabling full utilization of total memory capacity.
Data Source
AI summary
An embodiment of a memory controller device includes technology to control access to a multi-level memory including at least a first level memory and a second level memory, provide direct access to the first level memory based on a system memory address, cache accesses to the second level memory in a second portion of the first level memory, and address a memory space with a total memory capacity which includes a first capacity of the first portion of the first level memory plus a second capacity of the second level memory. Other embodiments are disclosed and claimed.