Memory Controller Wear Leveling via Registered System-Max-NOE
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Solution Overview
Problem
Frequent wear leveling processing in NAND flash memory leads to increased erasure cycles of physical blocks, reducing product life and impacting read/write speed due to time-consuming processing.
Innovation Solution
A memory controller that registers and manages the Registered-System-Max-NOE for logical areas, performing wear leveling based on these values to equalize erasure cycles without frequent processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If wear leveling processing is performed frequently to equalize NOEs of physical blocks, then the NOE equalization is improved, but product life decreases and read/write performance deteriorates due to increased erasure cycles and processing time
Solution Approach 1:
The patent applies preliminary action by registering the System-Max-NOE at the moment of spare block allocation to logical addresses. This pre-registration captures the maximum NOE value before any subsequent wear leveling operations, establishing a baseline that prevents future frequent wear leveling processing. By performing this registration action in advance during allocation, the system avoids the need for frequent subsequent wear leveling operations that would otherwise be required to maintain NOE equalization.
Solution Approach 2:
The patent uses copying by storing the System-Max-NOE value in a registration table associated with each logical address. Instead of continuously monitoring and comparing actual NOE values during operations, the system copies the maximum NOE value at allocation time and uses this copied value for wear leveling decisions. This copying approach eliminates the need for frequent real-time NOE measurements and comparisons, reducing processing overhead and erasure cycles.
2Stability of the object's composition
If wear leveling processing is performed frequently to equalize NOEs of physical blocks, then the NOE equalization is improved, but read/write speed decreases due to time-consuming processing
Solution Approach 1:
The patent applies preliminary action by registering the System-Max-NOE at the moment of spare block allocation to logical addresses. This pre-registration captures the maximum NOE value before any subsequent wear leveling operations, establishing a baseline that prevents future frequent wear leveling processing. By performing this registration action in advance during allocation, the system avoids the need for frequent subsequent wear leveling operations that would otherwise be required to maintain NOE equalization.
Solution Approach 2:
The patent uses copying by storing the System-Max-NOE value in a registration table associated with each logical address. Instead of continuously monitoring and comparing actual NOE values during operations, the system copies the maximum NOE value at allocation time and uses this copied value for wear leveling decisions. This copying approach eliminates the need for frequent real-time NOE measurements and comparisons, reducing processing overhead and erasure cycles.
Data Source
AI summary
The memory controller comprises a storage unit in which the Registered-System-Max-NOE is registered per logical area and a processor which registers, in the storage unit, the System-Max-NOE (the maximum value of multiple erasures respectively corresponded to multiple physical areas) at the time when allocating a spare physical area in one of the logical areas as the Registered-System-Max-NOE to be associated with the allocation destination logical area. The processor performs a wear leveling processing based on the Registered-System-Max-NOE per logical area.