Memory Controller ECC Encoding with Null Data Duplication
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current memory systems face challenges in enhancing the reliability of memory chips due to errors that occur during data storage and retrieval, particularly in volatile memory devices like DRAM, which are prone to data loss when power is shut down.
Innovation Solution
A memory controller with an integrated error correction circuit that performs ECC encoding and decoding, utilizing null data units for data duplication and interleaving data, parities, and flags to enhance error correction and reliability across multiple memory chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ECC encoding is performed on data units, then error correction capability is improved, but data processing complexity increases
Solution Approach 1:
The data is divided into multiple data units (e.g., 64-bit units) for independent ECC encoding. Each data unit can be processed separately, which reduces the complexity of handling large datasets and enables parallel processing. The encoding circuit processes each data unit individually to generate corresponding parity bits.
Solution Approach 2:
Null data units are created and inserted into the data stream to duplicate valid data units. This copying mechanism provides redundant data that can be used for error correction without significantly increasing the overall data volume, as the null units are identical and can be generated efficiently.
2Reliability
If multiple data units are processed with ECC encoding, then reliability is improved, but processing time increases
Solution Approach 1:
The system performs preliminary actions by pre-calculating and storing ECC lookup tables and null data unit templates before actual data processing. During data transmission, the encoding circuit can quickly retrieve and apply pre-computed values rather than performing complex calculations in real-time, significantly reducing processing time.
Solution Approach 2:
The encoding circuit operates continuously on data units as they arrive, maintaining a steady processing rate. By keeping the encoding process continuous and pipeline-based, the system minimizes idle time and ensures that error correction is performed without significant delays to data throughput.
3Reliability
If null data units are used for data duplication, then error correction is enhanced, but storage capacity requirements increase
Solution Approach 1:
Null data units are strategically placed at specific locations within the data structure where they provide maximum error correction benefit with minimal storage overhead. The null units are inserted only where needed to create redundancy patterns that enable error correction without uniformly increasing storage capacity throughout the entire data structure.
Data Source
AI summary
A memory controller that controls a memory module including a plurality of memory chips, the memory controller including an error correction circuit including an encoding circuit and a processor to control the error correction circuit. The encoding circuit, in a write operation, divides a user data set into data units, generates data flags indicating types of the data units, generates data parities based on the data units, generates flag parities based on the data flags, generates an encoded user data set by using at least one null data unit in which all or half of included data bits are zero, as a data duplication space for duplicating a valid data unit, generates a codeword set by interleaving the encoded user data set, the data parities, the data flags, the flag parities and a null bit bit-wisely, and transmits the codeword set to the memory module.