Memory Controller Open Block Designation for Program Speed

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing memory systems face challenges in improving program speed while maintaining data reliability, as the number of bits programmed per cell increases, leading to longer operation times and reduced reliability.

Innovation Solution

A memory controller that designates memory blocks as 'open' or 'closed' based on access counts, migrating data from lower-capacity blocks to higher-capacity blocks only when access thresholds are met, and skipping data migration for frequently accessed data to accelerate program operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is migrated from first storage unit to second storage unit when access count is below threshold, then data reliability is improved, but program speed deteriorates due to additional migration operations

Engineering Contradiction:
Improvedata reliabilityVSAvoidprogram speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system performs data migration in advance when access count is below threshold, preparing data for future high-access scenarios before they occur. This preliminary action ensures data is positioned in optimal storage units beforehand, improving reliability without impacting real-time program speed when access patterns change

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts migration behavior based on access count thresholds. When access count exceeds threshold, migration is skipped to prioritize program speed. When below threshold, migration occurs to improve reliability. This dynamic adaptation resolves the contradiction by contextually selecting between reliability and speed priorities

Inventive Principle:
Principle #15Dynamics

2Reliability

If data migration is performed frequently to maintain data reliability, then data reliability is improved, but program operation time increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidprogram operation time
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

Instead of continuous or frequent migration, the system implements periodic migration triggered by access count thresholds. Migration occurs only when the threshold condition is met, creating a periodic rather than continuous operation pattern. This reduces total migration frequency while maintaining reliability, thereby shortening overall program operation time

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The system changes the parameter of migration frequency based on access count thresholds. By monitoring access patterns and adjusting migration timing accordingly, the system optimizes the balance between reliability maintenance and operation time, performing migration only when necessary rather than on a fixed schedule

Inventive Principle:
Principle #35Parameter changes

3Reliability

If access count threshold is set low for frequent migration, then data reliability is improved, but program speed deteriorates due to more frequent migrations

Engineering Contradiction:
Improvedata reliabilityVSAvoidprogram speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The system uses access count as feedback to dynamically control migration behavior. When access count exceeds the threshold, the system receives feedback to skip migration and prioritize speed. When below threshold, feedback triggers migration for reliability. This feedback mechanism allows the system to adapt to actual access patterns rather than following a fixed migration schedule, resolving the speed-reliability contradiction contextually

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11972128B2Memory controller and method of operating the same
Publication Date: 2024.04.30 SK HYNIX INC
  • US11972128B2 patent drawing
  • US11972128B2 patent drawing
  • US11972128B2 patent drawing

AI summary

The present technology relates to a memory controller and a method of operating the same. The memory controller may include a block manager designating a first memory block as an open block, which is driven to program m-bit data per cell, where m is a natural number, an address manager increasing an access count value corresponding to a logical address for the first memory block whenever a program request or a read request including the logical address is received from a host, and a data manager determining a representative attribute of data programmed in the first memory block based on access count values for the logical addresses for the first memory block when a flush request is received from the host. The block manager may determine whether to designate a new open block according to the determined representative attribute.