Memory Controller Overlapping Sensing and Output Operations
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Solution Overview
Problem
Memory systems face challenges in efficiently handling large data sets due to the need for high-capacity data storage, particularly in simultaneously performing sensing and output operations across multiple logical pages during read operations, which can prolong read operation times.
Innovation Solution
A memory system architecture that allows for simultaneous sensing and output operations on logical pages by using a controller to manage commands and status/read information, enabling partial sensing and output operations during read operations, and sequential data output from page buffers, utilizing read voltages optimized for multi-level and quadruple-level cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If sensing operations are performed sequentially on all logical pages before output operations, then sensing accuracy is ensured, but read operation time is prolonged
Solution Approach 1:
The patent performs sensing operations on logical pages in advance before the output operation is triggered. When a read command is received, the controller initiates sensing operations on all logical pages of the selected page simultaneously or in overlapping sequences, so that when data output is needed, the sensing is already complete or nearing completion. This preliminary sensing action eliminates the sequential waiting time between sensing and output operations.
Solution Approach 2:
The patent implements continuous overlapping operations where sensing operations on different logical pages are performed concurrently or in interleaved sequences with output operations. While data from completed logical pages is being output, sensing operations continue on remaining logical pages without interruption. This continuous overlapping of sensing and output actions maximizes resource utilization and minimizes total read operation time.
2Loss of time
If multiple sensing operations are performed simultaneously on logical pages, then read operation time is reduced, but device complexity increases
Solution Approach 1:
The patent divides the page buffer into multiple separate buffer regions, each dedicated to storing data from a specific logical page. This segmentation allows the controller to independently manage and output data from different logical pages simultaneously through separate output paths or time-multiplexed channels, reducing the complexity of coordinating simultaneous sensing operations compared to a monolithic buffer structure.
Solution Approach 2:
The patent introduces a page buffer as an intermediary storage structure between the memory cell array and the output interface. This buffer acts as a mediator that temporarily holds sensed data from multiple logical pages, allowing the controller to decouple the sensing operations from the output operations. The buffer absorbs the complexity of simultaneous data management, enabling simpler control logic for initiating and coordinating multiple sensing operations.
3Quantity of substance
If high-capacity memory chips are used to store large data sets, then storage capacity is increased, but read operation time increases due to more logical pages
Solution Approach 1:
The patent segments the large-capacity memory chip into multiple logical pages, each with its own dedicated buffer region. This segmentation allows parallel or overlapping sensing operations on different logical pages within the same physical page, enabling the system to handle large storage capacity while maintaining efficient read performance by processing multiple segments simultaneously rather than sequentially.
Solution Approach 2:
The patent performs sensing operations on all logical pages of a selected page simultaneously or in overlapping sequences, even though the read command may only require data from a subset of these pages. This excessive sensing action ensures that all data is ready for immediate output, eliminating waiting time and allowing the system to efficiently handle large storage capacities by pre-processing more data than immediately needed.
Data Source
AI summary
A memory system in accordance with an embodiment may include a memory chip and a controller. The memory chip may store data in a plurality of logical pages by performing a sensing operation on a selected page in response to commands and performing an output operation of the data. The controller may transmit the commands to the memory chip so that a part of the sensing operation and a part of the output operation are simultaneously performed.