Memory Controller Packet Alignment for Host Boundary Overhead
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Solution Overview
Problem
In memory systems using nonvolatile memories, data transmission across host memory boundaries can lead to increased access overhead due to misalignment of data with access boundaries, particularly when using transaction-layer packets (TLPs) in NVMe and PCIe specifications.
Innovation Solution
A memory system with a controller that ensures address alignment by transmitting data in packets that span from the designated location to the next boundary, using a pool buffer to reconfigure commands and data to align with host access boundaries, thereby reducing the need for multiple writes and ECC parity regeneration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If data is transmitted using TLP without address alignment, then transmission flexibility is improved, but access overhead increases when data crosses host memory boundaries
Solution Approach 1:
The memory controller performs preliminary alignment of data with host memory access boundaries before transmission. By pre-adjusting the data positioning in the pool buffer to align with boundaries defined by the host's access unit, the system eliminates the need for additional overhead operations at the host side, thus resolving the contradiction between transmission flexibility and access overhead.
2Loss of time
If data is aligned with host memory access boundaries, then access overhead is reduced, but transmission complexity increases due to boundary calculations
Solution Approach 1:
The pool buffer acts as an intermediary between the data source and the host memory. It absorbs the complexity of boundary alignment calculations and operations, providing a simplified interface to the host. The pool buffer handles the alignment adjustments internally, shielding the host from complexity while achieving reduced access overhead.
3Reliability
If packet size is adjusted to align with boundaries, then data integrity is improved, but transmission efficiency decreases due to smaller packet sizes
Solution Approach 1:
The transmission data is segmented into multiple packets, with the first packet containing data from the designated location to the next boundary and subsequent packets containing the remaining data. This segmentation ensures that each packet aligns with host memory access boundaries, improving data integrity while allowing the use of standard transmission protocols for each segment.
Data Source
AI summary
According to one embodiment, a memory system includes a nonvolatile memory and a controller. The controller communicates with a host. The host includes a host memory and a circuit. The circuit accesses the host memory in a unit of first size. When an address designated as a first location of the host memory where data read from the nonvolatile memory is to be stored is not aligned with a boundary in the host memory defined in a unit of the first size, the controller transmits a first packet which has a size from the first location to the boundary and includes the read data to be stored from the first location, and transmits a second packet which has the first size and includes the read data to be stored from the boundary thereafter.