Memory Controller Page Buffer Data Backup for Power Save Mode

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Solution Overview

Problem

Current memory systems face challenges in minimizing power consumption, particularly in portable electronic devices, where rapid changes in operation modes between active and power save modes require efficient data backup and recovery processes without compromising performance.

Innovation Solution

A memory system with a controller that manages data backup and recovery using page buffers, prioritizing data based on usage, recovery order, power consumption, size, and latency, and stores data storage information in a register to facilitate seamless mode changes, thereby optimizing power usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If data is backed up in page buffers before mode change, then power consumption is minimized, but data recovery time increases

Engineering Contradiction:
Improvepower consumptionVSAvoiddata recovery time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

The controller performs preliminary data backup to page buffers before transitioning to power save mode. This preliminary action ensures that frequently accessed data is already in the faster page buffers when mode change occurs, minimizing the actual recovery time while maintaining low power consumption during normal operation

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts data storage location based on operation mode. In active mode, data resides in main memory for standard access. Before power save mode transition, critical data is dynamically moved to page buffers. Upon mode change back to active, the system dynamically recovers data from page buffers, optimizing the balance between power consumption and recovery time

Inventive Principle:
Principle #15Dynamics

2Reliability

If all data is backed up simultaneously, then data integrity is maintained, but system complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidbackup process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The backup process is segmented into priority levels. The controller identifies and backs up high-priority data first, then medium-priority data, and finally low-priority data. This segmentation maintains data integrity for critical operations while reducing the overall complexity of the backup process by handling data in manageable segments rather than all at once

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The controller creates selective copies of data to page buffers based on priority criteria rather than copying all data. This selective copying approach maintains integrity of critical data while simplifying the backup process by excluding non-essential data, thereby reducing system complexity

Inventive Principle:
Principle #26Copying

3Speed

If page buffers are used for data backup, then access speed is improved, but power consumption increases

Engineering Contradiction:
Improvedata access speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

Different storage locations are assigned different qualities based on access requirements. Page buffers provide high-speed access for frequently accessed data, while main memory handles less frequently accessed data. This local quality differentiation ensures fast access where needed while minimizing overall power consumption by not keeping all data in the higher-power page buffers

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

Instead of keeping all data in page buffers for maximum speed, the controller performs partial action by selectively moving only high-priority data to page buffers before mode change. This partial action provides sufficient access speed for critical operations while avoiding the excessive power consumption that would result from maintaining all data in page buffers

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS10037159B2Memory system and operating method thereof
Publication Date: 2018.07.31 SK HYNIX INC
  • US10037159B2 patent drawing
  • US10037159B2 patent drawing
  • US10037159B2 patent drawing

AI summary

A memory system includes a memory device including a plurality of blocks and a plurality of page buffers which respectively correspond to the blocks, wherein each of the blocks includes a plurality of pages in which data is stored, and a controller suitable for backing up data, which is stored in a memory included in the controller, in the page buffers when an operation mode is about to change to a power save mode.