Memory Controller Page Control Circuit Bank Group Scheduling
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Solution Overview
Problem
Existing memory controllers face inefficiencies in memory usage due to gaps occurring between commands when issuing read or write commands to banks within the same bank group, especially when page control commands for multiple banks are not synchronized.
Innovation Solution
A memory controller with a holding circuit to store access requests, a read and write control circuit to generate commands for banks across different groups, and a page control circuit that prioritizes page control commands based on the open or close states of pages across multiple banks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If adjacent read or write commands are issued to banks of different bank groups, then memory usage efficiency is improved, but redundant gaps occur between page control commands for multiple banks
Solution Approach 1:
The page control circuit determines in advance whether page control commands need to be issued for multiple banks before issuing adjacent read or write commands. By preliminarily checking the open/close states of pages in destination banks, the system can proactively schedule page control operations to avoid redundant gaps, thus resolving the contradiction between improving memory usage efficiency and eliminating time losses.
2Ease of operation
If page control commands are issued for multiple banks without coordination, then all banks can be managed, but redundant gaps occur reducing memory usage efficiency
Solution Approach 1:
The page control circuit continuously monitors and determines the open/close states of pages in multiple destination banks. This feedback mechanism allows the system to adaptively adjust the timing and scheduling of page control commands based on actual bank states, enabling coordinated page control across multiple banks without creating redundant gaps that would reduce memory usage efficiency.
Data Source
AI summary
A memory controller, that is connectable to a memory that includes a plurality of bank groups that each includes a plurality of banks, holds a plurality of access requests to the memory, generates read or write commands from each of the plurality of access requests such that banks of different bank groups are set as destinations of adjacent read or write commands, and issues a page control command for an access request that is selected from the plurality of access requests, wherein a page control command for an access request for which open or close states of pages of a plurality of banks that are set as destinations satisfy a predetermined condition is preferentially issued.