Memory Controller Page Serial Number Management for Read Voltage Control
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Solution Overview
Problem
Flash memory devices, particularly charge trap flash (CTF) memory cells, suffer from the initial verify shift (IVS) phenomenon, where stored data is lost due to changes in threshold voltage over time, leading to read data errors and the need for separate error correction, which is time-consuming.
Innovation Solution
A nonvolatile memory system with a memory controller that manages page serial numbers based on program elapsed time, using a program time stamp table and predefined table to control read voltages, reducing read latency and improving performance by selecting appropriate read voltage levels without scanning the entire table.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate error correction is performed for IVS phenomenon, then data accuracy is improved, but read time increases
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing compensation values for the IVS phenomenon in a lookup table during manufacturing or initialization. When reading data, the controller simply retrieves the pre-computed compensation value based on the elapsed time since programming, rather than performing error correction calculations in real-time. This eliminates the time-consuming error correction process while maintaining data accuracy.
2Reliability
If read voltage levels are adjusted dynamically, then read accuracy is improved, but control complexity increases
Solution Approach 1:
The patent changes the parameter of read voltage levels dynamically based on the program elapsed time. The memory controller adjusts the read voltage to compensate for threshold voltage shifts caused by the IVS phenomenon. By linking voltage adjustment to a measurable parameter (time elapsed since programming), the system achieves adaptive read accuracy without requiring complex real-time analysis of memory cell states.
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of a lookup table that stores pre-calculated read voltage levels or compensation values corresponding to different program elapsed times. This intermediary structure simplifies the control process by replacing complex real-time calculations with simple table lookups, reducing control complexity while maintaining read accuracy.
3Measurement precision
If program elapsed time is tracked for each page, then read voltage control precision is improved, but memory controller complexity increases
Solution Approach 1:
The patent applies preliminary action by pre-organizing read voltage levels into a lookup table indexed by program elapsed time ranges. Instead of tracking and calculating precise elapsed time for every single page read operation, the system uses predefined time ranges and corresponding voltage levels, simplifying the controller's burden while maintaining sufficient precision for effective compensation.
Data Source
AI summary
A nonvolatile memory system includes a nonvolatile memory device and a memory controller. The nonvolatile memory device includes memory blocks each having a plurality of pages and performs a read operation on the plurality of pages on the basis of read voltages. The memory controller is configured to manage page serial numbers of some of the plurality of pages according to a program elapsed time of each of the plurality of pages. When the memory controller receives a read command and a logical address from an external device, the memory controller is configured to select at least one of the managed page serial numbers, to compare the selected at least one of the page serial numbers with a page serial number of a page corresponding to the received logical address, and to control levels of the read voltages according to a comparison result.