Memory Controller Page Status Management for 3D Flash

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Solution Overview

Problem

Three-dimensional flash memory devices face data loss and inefficient memory usage due to the limited number of memory blocks and large block size, which complicates managing defective pages as bad blocks, unlike two-dimensional flash memory devices that have more blocks and smaller sizes.

Innovation Solution

Implementing a method for a memory controller to determine the status of pages based on program/erase cycle counts and error correction indicators, managing pages as normal, weak, or bad states, and performing specific operations such as closing or copying data from weak or bad pages, and applying different voltages during erase verify operations to prevent data loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If three-dimensional flash memory uses large memory blocks to reduce the number of blocks, then storage capacity is improved, but data loss risk increases when defective pages are present

Engineering Contradiction:
Improvestorage capacityVSAvoiddata loss risk
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments the memory management unit into multiple status states (normal state, weak state, bad state) to categorize pages based on their health condition. This segmentation allows selective management where only truly defective pages are excluded from further operations, while pages in weak state can still be used with precautions, thereby reducing data loss risk without sacrificing storage capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by differentiating management strategies for different page states within the same memory block. Pages are individually assessed and assigned different operational permissions based on their specific condition (normal, weak, or bad), allowing optimal utilization of each page while maintaining overall system reliability.

Inventive Principle:
Principle #3Local quality

2Reliability

If three-dimensional flash memory manages defective pages as bad blocks, then data loss is prevented, but memory usage efficiency decreases

Engineering Contradiction:
Improvedata loss preventionVSAvoidmemory usage efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments pages into three distinct status states rather than treating all defective pages uniformly as bad blocks. This segmentation enables fine-grained management where only pages in bad state are excluded from operations, while pages in weak state remain usable with appropriate precautions, significantly improving memory usage efficiency while maintaining data loss prevention.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the parameter of page status from binary (good/bad) to multi-state (normal/weak/bad). This parameter change allows the system to distinguish between temporarily degraded pages (weak state) and permanently defective pages (bad state), enabling continued use of weak pages and improving overall memory utilization efficiency.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If program operation requires multiple loops to ensure success, then programming reliability is improved, but operation time increases

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements feedback mechanisms through program loop counters and error correction indicators that monitor the success of program operations. Based on this feedback, the system can determine when to stop attempting programming (after a certain number of loops or when error correction fails), thereby balancing programming reliability with operational time by avoiding futile repeated attempts.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS9588714B2Method of operating memory controller and data storage device including memory controller
Publication Date: 2017.03.07 SAMSUNG ELECTRONICS CO LTD
  • US9588714B2 patent drawing
  • US9588714B2 patent drawing
  • US9588714B2 patent drawing

AI summary

In one embodiment, the method includes determining, at the memory controller, a status of a selected page of memory based on a program/erase cycle count for a block of the memory. The block of the memory includes the selected page. The program/erase cycle count indicates a number of times the block has been erased. The status is selected from a plurality of status states. The status states include a normal state, a weak state and a bad state.