Memory Controller Parallel Data Verification
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Solution Overview
Problem
The existing memory systems face inefficiencies in speeding up the write process while verifying data validity, as the operation of authenticating data takes significant time, impacting performance in devices like SSDs and NAND type flash memory.
Innovation Solution
A memory system is designed with a memory controller that transfers data to a non-volatile memory in parallel with executing data validity verification operations, utilizing a shared key for hash operations and a data buffer to manage data transfer efficiently, allowing concurrent data processing and storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data validity verification is performed before writing to non-volatile memory, then data security is improved, but write process time increases
Solution Approach 1:
The memory controller performs hash operations and data verification in advance before the actual write operation to non-volatile memory. By pre-processing the verification using shared keys and storing intermediate results in buffers, the system ensures data security is validated beforehand, allowing the final write operation to proceed without re-verification delays.
Solution Approach 2:
The system maintains continuous data flow by implementing parallel processing pipelines where data verification, hash computation, and memory write operations overlap in time. Multiple data blocks are processed concurrently through different verification stages, ensuring that the verification process does not create idle time in the write pipeline.
2Measurement precision
If data verification operation is executed sequentially before write, then verification accuracy is maintained, but processing speed decreases
Solution Approach 1:
The verification process is divided into independent segments that can be processed in parallel. Each data block undergoes hash verification as a separate unit using dedicated verification circuits, allowing multiple verification operations to execute simultaneously without interfering with each other's accuracy while dramatically improving overall processing throughput.
Solution Approach 2:
Verification buffers and intermediate storage elements are introduced between the data input and final write operation. These intermediaries hold verification results and allow the main data flow to continue while verification completes, effectively decoupling the timing of verification from the write operation without compromising verification thoroughness.
Data Source
AI summary
A memory system includes a non-volatile memory having a memory cell array which stores data in a non-volatile manner, and a memory controller which transfers data received from a host to the non-volatile memory in parallel with execution of an operation of verifying validity of the data. A corresponding method is also described.