Memory Controller Parity Buffer Management

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Solution Overview

Problem

Flash memory storage systems require larger buffer memories to prevent data loss due to coupling effects between physical pages, leading to increased manufacturing costs and storage space requirements.

Innovation Solution

A data writing method for rewritable non-volatile memory modules that involves generating parity information from sub-data streams and storing it in the buffer memory, while deleting the original data, allowing for efficient writing into physical erasing units and reducing the need for extensive buffer memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a larger buffer memory is used to temporarily store data during writing operations, then data reliability is improved by preventing data loss from coupling effects, but manufacturing cost and storage space requirements increase

Engineering Contradiction:
Improvedata reliabilityVSAvoidbuffer memory capacity
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the data writing process into distinct phases: first writing lower physical pages, then writing upper physical pages. By dividing the writing sequence and using parity information to protect each segment independently, the system maintains data reliability without requiring a large buffer to hold all data simultaneously. The buffer only needs to hold data for the current writing phase, not all data across multiple phases.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies preliminary action by writing protection information (parity data) into the memory before the actual data writing operation. This preliminary writing of parity information allows the system to detect and recover from programming failures during the subsequent data writing phase, reducing the buffer memory capacity needed to prevent data loss.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If data is kept in buffer memory until confirmation of successful programming, then data loss is prevented, but buffer memory capacity and manufacturing cost increase

Engineering Contradiction:
Improvedata loss preventionVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent uses parity information as a disposable protection mechanism that is written once into the memory and used for error detection and recovery. This eliminates the need for expensive, large-capacity buffer memory to continuously hold data until successful programming confirmation. The system achieves data loss prevention through this cheaper, write-once protection approach rather than expensive continuous buffering.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

3Adaptability or versatility

If a larger buffer memory is equipped in the flash memory storage system, then data written by the host system can be temporarily stored more effectively, but storage space requirements and manufacturing cost increase

Engineering Contradiction:
Improvedata storage capabilityVSAvoidbuffer memory capacity
Core Design Contradiction:
Adaptability or versatilityVSQuantity of substance

Solution Approach 1:

The patent introduces parity information as an intermediary element that mediates between the data writing operation and the buffer memory. This parity information acts as a protective layer that enables the system to use smaller buffer memory capacity while maintaining effective data storage capability. The intermediary parity data allows the system to recover from programming failures without needing large buffer capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9201785B2Data writing method, memory controller and memory storage apparatus
Publication Date: 2015.12.01 PHISON ELECTRONICS
  • US9201785B2 patent drawing
  • US9201785B2 patent drawing
  • US9201785B2 patent drawing

AI summary

A data writing method for a rewritable non-volatile memory module is provided. The method includes receiving a write command and data corresponding to the write command from a host system and temporarily storing the data into a buffer memory, and the data includes a plurality of sub-data streams. The method still includes transmitting the sub-data streams into the rewritable non-volatile memory module, thereby writing the sub-data streams into at least one physical erasing unit of the rewritable non-volatile memory module. The method further includes generating parity information based on at least portion of the sub-data streams; storing the parity information into the buffer memory and deleting the data from the buffer memory. Accordingly, the method can effectively utilize the storage space of the buffer memory.