Memory Controller Parity Generation for Non-Volatile Storage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems face challenges in efficiently generating and managing parity data for error detection and correction in non-volatile memory, leading to increased memory size requirements and higher costs and power consumption.
Innovation Solution
A memory system with a controller that writes data to non-volatile storage, reads it to generate parity data, and stores it in a parity storage unit, allowing for flexible parity generation based on available memory size and reducing the number of parallel frames read for parity generation, thereby minimizing memory usage and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If parity data is generated and stored for every written data in non-volatile memory, then error detection and correction capability is improved, but memory size requirements increase
Solution Approach 1:
The patent extracts the parity data generation and storage function from the main data storage path. Instead of storing parity data alongside user data in the non-volatile memory, the system separates parity data into a dedicated parity storage unit, allowing independent management and optimization of data and parity storage resources.
Solution Approach 2:
The system performs preliminary actions by generating parity data only when necessary (when available memory size exceeds threshold) and storing it in advance in the parity storage unit. This allows the system to prepare error correction capabilities proactively rather than reactively, improving reliability without constantly occupying memory resources.
2Measurement precision
If more memory is allocated for parity generation, then parity generation accuracy is improved, but power consumption increases
Solution Approach 1:
The system applies partial action by generating parity data only for portions of data that meet specific criteria (when available memory size exceeds threshold). Instead of continuously generating parity for all data, the system selectively processes data based on memory conditions, reducing unnecessary power consumption while maintaining adequate error protection where needed.
Solution Approach 2:
The system dynamically changes the parameter of parity generation based on available memory size. When memory availability exceeds a threshold, the system enables parity generation with higher accuracy; when memory is constrained, it reduces or suspends parity generation. This adaptive approach optimizes the balance between precision and power consumption.
3Productivity
If the number of parallel frames read for parity generation is increased, then parity generation speed is improved, but memory usage increases
Solution Approach 1:
The system dynamically adjusts the number of parallel frames read for parity generation based on available memory size. When memory availability is high, the system increases parallelism to accelerate parity generation; when memory is constrained, it reduces the number of parallel frames. This dynamic adaptation allows the system to optimize processing speed without exceeding memory capacity.
Data Source
AI summary
According to one embodiment, a memory system includes a non-volatile memory, and a controller configured to control the non-volatile memory. The controller is configured to write data to the non-volatile memory, read the written data from the non-volatile memory after writing of the data is completed, generate parity data corresponding to the read data, and write the generated parity data to a memory for parity storage.