Memory Controller Parity Recovery for Weak 3D Memory Pages
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Solution Overview
Problem
Three-dimensional semiconductor memory devices face issues with weak pages that result in uncorrectable errors, leading to reduced read performance and rapid depletion of usable memory blocks, especially in applications requiring high durability like vehicle systems.
Innovation Solution
A controller generates parity data based on data from adjacent pages to recover data from weak pages, using an exclusive-OR operation to correct errors, thereby maintaining the usability of memory blocks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in weak pages of three-dimensional semiconductor memory devices, then memory capacity is increased, but uncorrectable errors occur leading to reduced read performance
Solution Approach 1:
The controller performs preliminary actions by generating and storing parity data in strong pages before data errors occur. When errors are detected in weak pages, the controller uses this pre-generated parity data to recover the corrupted data, preventing read failures without requiring physical remapping of data.
Solution Approach 2:
Parity data acts as an intermediary element that bridges the weak pages (containing actual data) and the strong pages (containing recovery information). The parity data enables error correction by providing backup information that can reconstruct corrupted data without direct access to the faulty memory locations.
2Reliability
If error correction operations are performed on weak pages, then data reliability is improved, but usable memory blocks are rapidly depleted
Solution Approach 1:
The controller generates and stores parity data in advance during programming operations. This preliminary preparation of recovery data allows the system to correct errors without needing to remap data to new memory blocks, thereby extending the lifespan of usable memory blocks.
Solution Approach 2:
Instead of discarding data from weak pages when errors occur, the system recovers the data by using parity information stored in strong pages. This recovery process allows the same memory blocks to be reused multiple times without depletion.
3Reliability
If parity data is generated and stored for every page, then data recovery capability is maximized, but device complexity and storage overhead increase
Solution Approach 1:
The controller applies different quality levels of error correction to different memory regions. Parity data is generated and stored selectively in strong pages based on their reliability characteristics, rather than uniformly across all pages. This localized approach optimizes recovery capability where needed while minimizing overall complexity.
Data Source
AI summary
A controller controls a semiconductor memory device including a plurality of pages. The controller includes a command generator configured to generate a command for controlling a program operation or a read operation of a semiconductor memory device, and a data recovery manager configured to generate parity data corresponding to a weak page among a plurality of pages included in the semiconductor memory device and recover data programmed to the weak page.